Processor Configured for Dynamic Programming via Recurrence Instructions

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Solution Overview

Problem

Dynamic programming algorithms, such as the Smith-Waterman algorithm, face inefficiencies in processing large genomic data due to reliance on software solutions that are slow and dedicated hardware solutions that waste resources when not performing dynamic programming tasks.

Innovation Solution

Configuring processors, including GPUs and CPUs, with instructions that enable parallel computation of recurrence equations using a matrix, allowing for the acceleration of sequence alignments by computing states in swaths and storing them in registers, thereby optimizing hardware usage and improving processing speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If software solutions are used to perform dynamic programming algorithms, then implementation flexibility is maintained, but processing speed is slow

Engineering Contradiction:
Improveprocessing speedVSAvoidimplementation complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent replaces software-based dynamic programming execution with dedicated hardware circuitry that implements recurrence equation computation. The hardware includes specialized units for computing matrix elements according to recurrence relations, replacing the mechanical/software execution model with an optimized hardware architecture that achieves accelerated processing speeds while maintaining algorithmic flexibility through configurable hardware parameters.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If dedicated hardware solutions are used to accelerate dynamic programming, then processing speed increases, but hardware resources are wasted when not performing dynamic programming tasks

Engineering Contradiction:
Improveprocessing throughputVSAvoidhardware resource waste
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent designs a hardware architecture that can perform multiple functions beyond dynamic programming. The recurrence equation computation units can be configured to execute different algorithms and the matrix computation hardware can adapt to various computational tasks, allowing the same hardware resources to serve multiple purposes and reducing waste when dynamic programming is not being performed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The hardware architecture incorporates dynamic reconfigurability, allowing the processing units to be dynamically allocated and reconfigured based on current computational needs. When dynamic programming tasks are active, the hardware is optimized for those computations; when inactive or performing other tasks, resources can be reallocated or placed in low-power states, reducing energy waste.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If matrix computations are performed using traditional methods, then implementation is simple, but processing time increases for large genomic datasets

Engineering Contradiction:
Improvecomputation timeVSAvoidhardware architecture complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent divides the matrix computation task into segmented recurrence equation computations. Instead of computing entire matrices at once using traditional methods, the hardware computes matrix elements in segments according to recurrence relations, processing subsets of the genomic data in parallel. This segmentation enables faster computation of large genomic datasets while managing hardware complexity through modular architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from traditional sequential matrix computation to a parallel hardware architecture that exploits dimensional parallelism. Multiple recurrence equation computation units operate simultaneously on different matrix elements, and the hardware architecture adds spatial dimensions of parallel processing to the computational model, dramatically reducing computation time for large genomic datasets.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11726757B2Processor for performing dynamic programming according to an instruction, and a method for configuring a processor for dynamic programming via an instruction
Publication Date: 2023.08.15 NVIDIA CORP
  • US11726757B2 patent drawing
  • US11726757B2 patent drawing
  • US11726757B2 patent drawing

AI summary

The disclosure provides processors that are configured to perform dynamic programming according to an instruction, a method for configuring a processor for dynamic programming according to an instruction and a method of computing a modified Smith Waterman algorithm employing an instruction for configuring a parallel processing unit. In one example, the method for configuring includes: (1) receiving, by execution cores of the processor, an instruction that directs the execution cores to compute a set of recurrence equations employing a matrix, (2) configuring the execution cores, according to the set of recurrence equations, to compute states for elements of the matrix, and (3) storing the computed states for current elements of the matrix in registers of the execution cores, wherein the computed states are determined based on the set of recurrence equations and input data.