Heterogeneous Processor Instruction Translation
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Solution Overview
Problem
Existing methods do not optimally utilize heterogeneous processing systems by translating programs of virtual machine instructions into native instructions for execution across multiple processors, leading to suboptimal performance and resource utilization.
Innovation Solution
A method that translates sections of a program into instructions for different processors in a heterogeneous processing system, selecting boundary locations to minimize the aggregate cost of execution, which can be based on instruction cycles, energy consumption, or other cost factors, using techniques such as path construction and pruning to optimize resource allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If machine instructions are executed successively by a single processor, then implementation simplicity is maintained, but system performance and resource utilization are suboptimal
Solution Approach 1:
The program is divided into multiple sections, each assigned to different processors in the heterogeneous system. The translation unit segments the translated code into portions suitable for execution on processors with different instruction sets, allowing parallel execution and better resource utilization while maintaining manageable complexity through structured code division.
2Speed
If instructions are translated for a specific processor, then execution efficiency on that processor improves, but adaptability to different processors decreases
Solution Approach 1:
Different sections of the translated program are optimized for specific processor types based on their instruction set characteristics. The translation unit analyzes the program and assigns sections to processors that best match their instruction requirements, achieving local optimization for each processor while maintaining overall system adaptability through the heterogeneous architecture.
3Productivity
If tasks are distributed across heterogeneous processors, then resource utilization improves, but determining optimal task assignment becomes more complex
Solution Approach 1:
The translation unit performs preliminary analysis and assignment of program sections to processors before execution. By determining the optimal distribution of code sections across heterogeneous processors during the translation phase, the system establishes an efficient task assignment that maximizes resource utilization without requiring complex runtime scheduling decisions.
4Loss of energy
If all program sections are executed on one processor type, then implementation simplicity is maintained, but execution cost and power consumption increase
Solution Approach 1:
The system changes the parameter of processor type selection based on the specific instruction requirements of each program section. By varying which processor executes which section according to instruction set匹配度, the system reduces overall power consumption and execution cost while managing architectural complexity through the translation unit's intelligent assignment strategy.
Data Source
AI summary
A series (20) of original instructions for a single processor is translated into implementing instructions for executions distributed over a plurality of processors (12,16) of different type. The series (20) of original instructions is split into successive sections (22a-c,24a,b) assigned to respective ones of the processors (12,16). Operand transfer instructions are added to the sections (22a-c,24a,b) to support data dependencies between the sections (22a-c,24a,b). The assignment includes selecting a location of a boundary in the series of original instructions between successive ones of the sections (22a-c,24a,b) so as to substantially minimize an aggregate of the execution cost factors of the original instructions as implemented and including costs for the operand transfer instructions. Preferably, the locations of the boundaries are determined from a search among different boundaries positions.