Processor Power Management via Dynamic Voltage and Frequency Scaling

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Solution Overview

Problem

Existing computer device power management systems throttle processors to prevent current overload, but this often results in performance degradation and limited power savings, as the operating voltage remains at maximum even with reduced frequency.

Innovation Solution

A power management system that dynamically adjusts the processor's power state by throttling its operating frequency and voltage, using a controller to monitor current draw and generate signals for incremental or decremental changes in power states based on throttling levels, thereby optimizing power usage without frequent interruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the processor is throttled to reduce current draw, then power consumption is reduced, but processor performance deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidprocessor performance
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The system dynamically adjusts the processor power state between full performance mode and throttled mode based on real-time current draw monitoring. The controller continuously monitors current consumption and dynamically transitions the processor between operational states to optimize the balance between power savings and performance requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters of the processor by adjusting its power state. When current draw exceeds thresholds, the processor transitions from a high-performance state to a throttled state with reduced clock frequency, thereby changing its operational characteristics to reduce power consumption while maintaining functionality.

Inventive Principle:
Principle #35Parameter changes

2Power

If the processor is throttled to prevent current overload, then current draw is reduced, but processor operating frequency decreases

Engineering Contradiction:
Improvecurrent drawVSAvoidoperating frequency
Core Design Contradiction:
PowerVSSpeed

Solution Approach 1:

The system dynamically adjusts the processor operating frequency based on monitored current draw levels. The controller continuously adapts the processor state in response to changing power conditions, transitioning between frequency states to maintain current draw within acceptable thresholds while preserving performance when possible.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements a feedback mechanism where the controller monitors current draw from the power source and uses this information to control processor throttling. The monitoring component provides continuous feedback on power consumption, which the controller uses to adjust processor frequency and power state accordingly.

Inventive Principle:
Principle #23Feedback

3Use of energy by moving object

If the processor is frequently throttled to manage power, then power consumption is controlled, but processing interruptions increase

Engineering Contradiction:
Improvepower consumptionVSAvoidprocessing interruptions
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system performs preliminary monitoring of current draw to anticipate when throttling may be needed. By continuously tracking power consumption before thresholds are exceeded, the system can proactively adjust processor state to prevent overload conditions, reducing the need for frequent reactive throttling interruptions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements periodic monitoring of current draw at defined intervals and uses threshold-based triggers to determine when throttling should occur. This periodic approach with hysteresis thresholds reduces the frequency of state transitions compared to continuous reactive adjustments, thereby minimizing processing interruptions while maintaining power control.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentEP2078233B1Computer device power management system and method
Publication Date: 2011.12.07 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • EP2078233B1 patent drawingFigure 1~2
  • EP2078233B1 patent drawingFigure 3
  • EP2078233B1 patent drawingFigure 4

AI summary

A computer device power management system (10) comprises a controller (30, 70) configured to throttle a processor (14) of a computer device (12) responsive to an overcurrent condition associated with a power source (20, 22) powering the computer device (12), the controller (30, 70) configured to adjust a power state of the processor (14) to at least one of a plurality of predetermined power states based on a level of the throttle.