Processor Logic Block Testing With Interrupt Save and Restore
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Solution Overview
Problem
Current testing methods for data processing systems during normal operation are inefficient, as traditional test codes provide incomplete and non-uniform coverage, and methods like scan testing lose the processor's state, while high interrupt frequencies hinder meaningful testing between interrupts.
Innovation Solution
The implementation of a stop and test circuitry that allows for saving and restoring the test state, enabling continuous testing by filtering interrupts and using a save/restore mode to maintain test state integrity during normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional test codes are executed during normal operation, then testing can be performed, but test coverage is incomplete and non-uniform
Solution Approach 1:
The patent segments the testing process into multiple test vectors that can be independently selected and executed. Different test vectors target different functional areas of the data processing system, enabling comprehensive yet flexible test coverage. The test controller can choose specific test vectors based on testing needs without executing complete traditional test suites.
Solution Approach 2:
The patent implements dynamic test execution by allowing the test controller to adaptively select and execute test vectors based on system state, interrupt conditions, and testing priorities. The testing process is no longer static but dynamically adjusted to maximize coverage while minimizing impact on normal operation.
2Reliability
If scan testing is performed during operation, then test coverage improves, but the processor's state is lost
Solution Approach 1:
The patent performs preliminary saving of the processor state before executing test vectors. The current state of the processor is captured and stored in a state storage element prior to test execution, enabling restoration after testing if needed. This preliminary action prevents loss of processor state information.
Solution Approach 2:
The patent creates a copy of the processor state in a separate storage element before testing. Instead of modifying the original processor state directly, a副本 is made and used for testing purposes, allowing the original state to be preserved and restored if necessary.
3Reliability
If testing is performed continuously during normal operation, then testing confidence increases, but system performance deteriorates due to high interrupt frequencies
Solution Approach 1:
The patent implements periodic testing by executing test vectors at scheduled intervals rather than continuously. The test controller can pause testing when interrupt frequency becomes too high and resume when conditions are favorable, creating a periodic rather than continuous testing rhythm that balances testing confidence with system performance.
Solution Approach 2:
The patent applies partial testing by selecting and executing only certain test vectors rather than running complete test suites. This partial action approach provides sufficient testing confidence for critical functions while minimizing the performance impact on the overall system operation.
Data Source
AI summary
A method of testing a processing includes performing a test of at least one logic block of a processor of a data processing system; receiving an interrupt; stopping the performing the test for the processor to respond to the interrupt, wherein the stopping the performing the test includes storing test data of the test to a memory prior to the processor responding to the interrupt; and after the processor responds to the interrupt, resuming performing the test, wherein the resuming performing the test includes retrieving the test data from the memory and using the retrieved test data for the resuming performing the test.