Multi-Processor Synchronization via Time Base Counter Skew Adjustment
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Solution Overview
Problem
In multi-processor systems, variations in execution time between processors can lead to clock skew, causing inconsistencies in data monitoring and analysis, which is undesirable and needs to be synchronized to ensure consistent operation.
Innovation Solution
A method where each processor shares its time base counter counts over a communication bus to determine initial and present differences, allowing for synchronization adjustments to eliminate skew by adjusting the execution frame length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If processors execute instructions independently without synchronization mechanisms, then each processor can operate at its own execution rate, but time skew develops between processors leading to inconsistent data monitoring and analysis
Solution Approach 1:
The system continuously monitors time base counter differences between processors and uses this feedback to detect skew. When skew is detected, the system adjusts processor execution frames to correct the timing discrepancy, creating a closed-loop control system that maintains synchronization while allowing independent execution
Solution Approach 2:
Time base counters serve as an intermediary mechanism that provides a common reference framework for all processors. By comparing counter values across processors, the system can detect timing skew without requiring direct processor-to-processor synchronization signals, enabling indirect measurement and correction
2Reliability
If processors are frequently synchronized to maintain time alignment, then consistency between processors is improved, but system complexity and synchronization overhead increase
Solution Approach 1:
Each processor independently monitors its own time base counter and compares it with other processors' counters. The system performs self-diagnosis of timing skew without requiring external synchronization controllers, allowing processors to autonomously detect and report timing discrepancies
Solution Approach 2:
Instead of requiring processors to share complex synchronization signals or state information, the system simply copies and compares time base counter values between processors. This lightweight copying approach provides sufficient information for skew detection without the overhead of complex synchronization protocols
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3
AI summary
A multi-processor system includes a first processor 52a that includes a first time base counter 58a that outputs a first time base count, a second processor 52b that includes a second time base counter 58b that outputs a second time base count, and a communication bus 54. The first and second processors exchange the first and second time base counts on the communication bus. The first and second processors determine a skew based upon a difference between the first and second time base counts, and the first and second processors synchronize with each other based upon the skew.