Processor Vector Lane Power Gating for Narrow Data Operations
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Solution Overview
Problem
Vector processors consume high amounts of power due to the wide data width, as they can only be turned on or off in their entirety, leading to inefficiency when executing smaller data width operations.
Innovation Solution
The vector data path is divided into smaller vector lanes, allowing the programmer to control the number of active lanes by writing into a control register field, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the vector data path is divided into smaller vector lanes, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The vector data path is divided into multiple smaller vector lanes (e.g., four 64-bit lanes from a 256-bit path). Each lane can be independently controlled and powered, allowing the system to activate only the necessary number of lanes based on operation requirements, thereby reducing power consumption while maintaining the capability to handle wide data operations when needed.
Solution Approach 2:
The system dynamically adjusts the number of active vector lanes based on the specific operation being executed. A control register allows programmers to specify the number of active lanes, enabling the vector data path to adapt its configuration and power consumption levels to match the actual computational requirements of each operation.
2Ease of operation
If the entire vector unit is turned on or off, then control is simplified, but power efficiency decreases when executing smaller data width operations
Solution Approach 1:
The vector unit is segmented into multiple independently controllable lanes. Instead of treating the entire vector unit as a single on/off entity, each lane can be individually activated or deactivated, allowing fine-grained power management that maintains control simplicity while improving power efficiency for operations using smaller data widths.
Solution Approach 2:
The system changes the operational parameter of the vector unit from a binary on/off state to a variable number of active lanes. This parameter change allows the vector unit to operate at different power levels corresponding to the actual data width requirements, improving power efficiency without significantly complicating control through the use of a control register.
Data Source
AI summary
In an embodiment, a circuit includes a data path including at least a first lane of a first width and a second lane of a second, larger, width; an execution unit to execute a first instruction on data of the first width or less using the first lane, and to execute a second instruction on data greater than the first width and less than or equal to the second width using the second lane; and a control register that stores a value indicating which of the first and second lanes to be used in instruction execution by the execution unit. The circuit is configured to, based on the value stored in the control register, power off the first lane when the execution unit executes the second instruction but not the first instruction, and power off the second lane when the execution unit executes the first instruction but not the second instruction.