Program Verify Circuit for Flash Memory Density
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Solution Overview
Problem
The existing program verify operation in flash memory devices requires additional circuitry for comparing threshold voltages, which increases the number of transistors needed, occupying valuable space on the integrated circuit die and hindering memory density.
Innovation Solution
A program verify circuit that compares at least a portion of a digital count used to generate a ramped voltage with a stored target threshold voltage, eliminating the need for additional transistors by using a reduced component count and sense circuitry to determine if the memory cell has been activated, thereby inhibiting further programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional circuitry is used to perform greater than comparison in the page buffer, then the program verify operation can determine if the present threshold voltage is greater than or equal to the target threshold voltage, but the number of transistors increases significantly, occupying valuable space on the integrated circuit die
Solution Approach 1:
The patent extracts the comparison function from the page buffer circuitry and relocates it to a separate comparison circuit. This separation removes the burden of implementing complex greater-than comparison logic within each page buffer, thereby reducing the transistor count in the page buffer while maintaining the required verification functionality in the dedicated comparison circuit.
Solution Approach 2:
The patent introduces a digital-to-analog converter (DAC) as an intermediary component that generates a ramped voltage based on a digital count. This ramped voltage serves as a mediator between the digital control logic and the analog threshold voltage comparison, enabling the verification operation without requiring complex direct comparison circuitry in the page buffer.
2Reliability
If additional circuitry is used to perform greater than comparison in the page buffer, then the program verify operation can determine if the present threshold voltage is greater than or equal to the target threshold voltage, but valuable real estate on the integrated circuit die is consumed
Solution Approach 1:
The patent extracts the comparison function from the page buffer circuitry and relocates it to a separate comparison circuit. This separation removes the burden of implementing complex greater-than comparison logic within each page buffer, thereby reducing the transistor count in the page buffer while maintaining the required verification functionality in the dedicated comparison circuit.
Solution Approach 2:
The patent implements a shared comparison circuit that serves multiple page buffers, rather than dedicating separate comparison circuitry to each page buffer. This universal approach allows the same comparison hardware to be reused across multiple bit lines, significantly reducing the total transistor count and die area required for program verify operations across the entire memory array.
3Reliability
If a large number of transistors are used for comparison circuitry, then the program verify operation can be performed, but memory density is hindered due to reduced space for memory cells
Solution Approach 1:
The patent implements a shared comparison circuit that serves multiple page buffers, rather than dedicating separate comparison circuitry to each page buffer. This universal approach allows the same comparison hardware to be reused across multiple bit lines, significantly reducing the total transistor count and die area required for program verify operations across the entire memory array.
Solution Approach 2:
The patent extracts the comparison function from the page buffer circuitry and relocates it to a separate comparison circuit. This separation removes the burden of implementing complex greater-than comparison logic within each page buffer, thereby reducing the transistor count in the page buffer while maintaining the required verification functionality in the dedicated comparison circuit.
Data Source
AI summary
Methods for program verifying a memory cell include generating an access line voltage in response to a count and applying the access line voltage to a control gate of the memory cell, and generating a pass signal in response to the access line voltage activating the memory cell. Methods further include comparing at least a portion of the count to an indication of a desired threshold voltage of the memory cell, and when the at least a portion of the count matches the indication of the desired threshold voltage of the memory cell, determining if the pass signal is present. Methods further include generating a signal indicative of a desire to inhibit further programming of the memory cell if the pass signal is present when the match is indicated.


