Loop-Dependent Program-Verify Technique Switching
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Solution Overview
Problem
Existing memory devices face challenges in achieving both fast and accurate programming of memory cells due to varying programming rates, leading to overlapping threshold voltage distributions that can result in run-time errors, with existing solutions like multistep verify and quick pass write techniques either degrading performance or reducing accuracy.
Innovation Solution
Implementing a system that selectively uses fast-programming and precision-based verification techniques for each iteration of the verify operation, based on the position of memory cells within the threshold voltage distribution, to efficiently narrow the threshold voltage distributions and conserve resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single verification technique is used for all iterations, then the verification process is simple, but programming accuracy deteriorates due to overlapping threshold voltage distributions
Solution Approach 1:
The patent applies dynamics by making the verification technique adaptable across different iterations. The system transitions from a static single-technique approach to a dynamic multi-technique approach where the verification method changes based on the iteration number, allowing optimization of both simplicity and accuracy at different stages of the programming process
Solution Approach 2:
The patent changes the verification technique parameter based on the iteration number. By selecting different verification techniques (first verification technique for early iterations, second verification technique for later iterations), the system optimizes programming accuracy while managing complexity across the programming process
2Productivity
If fast-programming verification technique is used, then programming speed is improved, but accuracy deteriorates due to overlapping threshold voltage distributions
Solution Approach 1:
The patent segments the verification process into different iterations, applying different verification techniques to different segments. Fast-programming verification is applied to early iterations where speed is critical, while more accurate verification techniques are applied to later iterations where precision is needed to resolve overlapping threshold voltage distributions
Solution Approach 2:
The system dynamically selects the verification technique based on the iteration number, transitioning from fast-programming mode to high-accuracy mode as programming progresses, thereby optimizing both speed and accuracy at appropriate stages
3Manufacturing precision
If precision-based verification technique is used for all iterations, then programming accuracy is improved, but programming time increases
Solution Approach 1:
The patent applies partial action by using the more time-consuming precision-based verification technique only for specific iterations (later iterations) where it is most needed to ensure accuracy, rather than applying it to all iterations. This reduces total verification time while maintaining necessary accuracy
4Manufacturing precision
If multiple verification techniques are used for different iterations, then programming accuracy is improved, but device complexity increases
Solution Approach 1:
The patent manages complexity by systematically changing the verification technique parameter based on the iteration number. This structured approach to parameter change makes the multi-technique system manageable through clear rules for technique selection, reducing the perceived complexity while maintaining high accuracy
Data Source
AI summary
A storage device for verifying whether memory cells have been programmed. The storage device may be configured to use a verification technique, that is part of a set of verification techniques, to verify data states of a set of memory cells of a selected word line. The one or more verification techniques may be utilized based on an iteration of the verify operation that is to be performed. The storage device may be further configured to perform, using the verification technique, a next iteration of the program-verify operation to verify whether one or more memory cells have been programmed. Using the verification technique and performing the next-iteration of the program-verify operation are to be repeated until the set of memory cells have been verified.


