Programmable Array Signal Routing for 3D IC Die Stacks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In three-dimensional integrated circuits (3DICs), existing technologies face challenges in effectively routing signals between stacked dies, leading to inefficiencies in signal transmission and potential failures due to the lack of a robust and programmable connection mechanism.
Innovation Solution
The implementation of a programmable array and programmable array control unit in each die, which allows for the creation of dedicated signal routes between contacts on different dies through programmable circuits and control units, enabling flexible and reliable signal routing within the die stack.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed signal routing mechanism is used in stacked dies, then the structure is simple and easy to manufacture, but the adaptability and reliability are poor when dies fail
Solution Approach 1:
The patent implements dynamic signal routing by replacing fixed interconnect structures with programmable connection elements that can be reconfigured at runtime. Each die contains a programmable array of connection elements that can dynamically establish or break connections between signal routes and functional circuitry, allowing the system to adapt to die failures and reconfigure signal paths on-the-fly.
Solution Approach 2:
The patent changes the state parameters of connection elements (conducting vs. non-conducting states) to enable flexible routing. By controlling the electrical state of programmable connection elements through control signals, the system can dynamically alter signal path configurations without physical reconfiguration, thereby improving reliability while managing complexity through software/control logic.
2Adaptability or versatility
If programmable arrays are added to each die for flexible routing, then the adaptability and reliability improve, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent segments the routing functionality into modular programmable connection elements that are distributed across multiple dies. Each die contains its own programmable array, allowing independent configuration and testing. This segmentation enables incremental manufacturing and testing, where each die can be manufactured and validated separately before assembly into the stacked configuration.
Solution Approach 2:
The programmable connection elements serve multiple functions: they act as switches for signal routing, as test points for die validation, and as reconfigurable interconnects for adapting to different operational scenarios. This multi-functionality reduces the need for separate dedicated structures for each function, thereby managing manufacturing complexity while achieving high adaptability.
3Reliability
If redundant dies are stacked with programmable routing, then the yield and product lifetime are enhanced through bypass capability, but the device complexity and space requirements increase
Solution Approach 1:
The patent utilizes the vertical stacking dimension to implement redundancy and bypass capabilities. Instead of adding redundant routing paths in the horizontal plane (which would increase area), the solution stacks dies vertically and uses programmable connection elements to selectively activate or bypass specific dies in the vertical sequence. This dimensional approach allows redundancy without proportionally increasing the footprint volume.
Data Source
AI summary
An integrated circuit die stack comprises a first die coupled with a second die. The first die has a first memory volume. The second die has a second memory volume different from the first memory volume. Each of the first and second dies comprises a functional circuitry and a programmable array coupled with the functional circuitry. The programmable arrays in the first and second dies are programmed to bypass one of the first die or the second die having the smaller of the first memory volume or the second memory volume at a first time period.


