Method of notifying a process or programmable atomic operation traps
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Solution Overview
Problem
In chiplet systems, programmable atomic transactions executed by a memory controller are unaware of the process causing exceptions, leading to inefficiencies in handling memory faults and increased overhead due to constant flag polling by the operating system.
Innovation Solution
The programmable atomic unit sends a response to the calling processor, allowing the processor to handle exceptions, thereby enabling the system to trap at the point of the exception and facilitating proper error handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If the memory controller executes programmable atomic transactions without process awareness, then the memory controller can operate independently, but exception handling becomes inefficient requiring constant flag polling by the operating system
Solution Approach 1:
The patent implements a feedback mechanism where the memory controller sends exception notifications back to the calling processor. When an exception occurs during programmable atomic transaction execution, the memory controller generates an exception notification containing exception information and sends it to the processor that initiated the transaction. This allows the processor to handle exceptions efficiently without requiring continuous polling by the operating system, thus maintaining autonomous operation while improving exception handling efficiency.
2Reliability
If the operating system constantly polls flags to detect exceptions, then exception detection can be implemented, but system overhead increases
Solution Approach 1:
The patent implements a self-service mechanism where the memory controller automatically detects exceptions during transaction execution and generates exception notifications without requiring external polling. The memory controller monitors its own operation, detects exception conditions, and actively notifies the calling processor. This eliminates the need for the operating system to continuously poll flags, reducing system overhead and energy consumption while maintaining reliable exception detection.
3Speed
If the memory controller handles all exception processing, then exception response can be immediate, but the memory controller complexity increases
Solution Approach 1:
The patent extracts exception handling functionality from the memory controller and returns it to the calling processor. The memory controller's role is reduced to detecting exceptions and sending notification signals to the processor. The actual exception processing, including analysis and resolution, is performed by the processor that has the necessary context and capabilities. This division of labor maintains immediate exception response through active notification while preventing the memory controller from becoming overly complex.
Data Source
AI summary
Disclosed in some examples, are methods, systems, programmable atomic units, and machine-readable mediums that provide an exception as a response to the calling processor. That is, the programmable atomic unit will send a response to the calling processor. The calling processor will recognize that the exception has been raised and will handle the exception. Because the calling processor knows which process triggered the exception, the calling processor (e.g., the Operating System) can take appropriate action, such as terminating the calling process. The calling processor may be a same processor as that executing the programmable atomic transaction, or a different processor (e.g., on a different chiplet).