Programmable Buffer Circuit for Low-Voltage ADC Sensor Inputs

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Solution Overview

Problem

Analog-to-digital converters (ADCs) with low input impedance can degrade sensor accuracy by drawing excessive current from the sensor output, and existing buffer circuits often fail to operate effectively across the full rail-to-rail analog voltage range, particularly at low input voltages.

Innovation Solution

A programmable buffer circuit with modules for gain, level shifting, chopping, and filtering, which can operate in differential or single-ended mode, and includes a charge pump to compensate for voltage offsets, allowing it to handle low input voltages and adjust its configuration to accommodate various input ranges and signal types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If an ADC with low input impedance is used to convert analog signals to digital codes, then the ADC can process signals effectively, but the sensor accuracy is degraded due to excessive current draw from the sensor output

Engineering Contradiction:
Improvesignal conversion capabilityVSAvoidsensor accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

A buffer circuit is introduced as an intermediary component between the sensor and the ADC. The buffer has high input impedance that does not load the sensor, and low output impedance that can drive the ADC input, thus protecting sensor accuracy while enabling effective signal conversion

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If a buffer circuit is designed to operate across the full rail-to-rail analog voltage range, then it can handle both low and high input voltages, but existing buffer circuits fail to operate effectively at low input voltages

Engineering Contradiction:
Improvevoltage range coverageVSAvoidoperation effectiveness at low voltages
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The buffer circuit incorporates programmable configuration that allows it to adapt its operating characteristics dynamically. By reconfiguring internal switches and circuit elements based on the input voltage level, the buffer maintains effective operation across the entire rail-to-rail range, including at low input voltages where fixed-design buffers fail

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If a buffer circuit is made programmable with multiple modules for gain, level shifting, chopping, and filtering, then it can accommodate various input ranges and signal types, but the device complexity increases

Engineering Contradiction:
Improveconfiguration flexibilityVSAvoidcircuit module quantity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The buffer circuit integrates multiple functional modules (gain control, level shifting, chopping, filtering) into a single unified device that can be programmably configured. This multi-functional design allows one buffer circuit to replace what would traditionally require multiple separate circuits, achieving versatility while managing complexity through integration

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8941410B1Programmable buffer circuit
Publication Date: 2015.01.27 INFINEON TECHNOLOGIES AMERICAS CORP
  • US8941410B1 patent drawing
  • US8941410B1 patent drawing
  • US8941410B1 patent drawing

AI summary

Buffer circuit embodiments are described. A buffer circuit includes an input configured to receive an input signal and a buffer configured to generate an output signal based on the input signal. In one embodiment, the buffer circuit includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based on the selected configuration. In another embodiment, the buffer circuit further includes a programmable output filter coupled with the buffer, wherein the programmable output filter is programmable with a selected configuration form a plurality of configurations, and wherein the programmable output filter filters a frequency band of the output signal based on the selected configuration.