Programmable On-Chip Delay Measurement for Simulation-Silicon Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Previous techniques for measuring propagation delays in integrated circuits are inefficient, requiring numerous test structures that occupy significant space on-chip, making them costly and unsuitable for obtaining various types of delay measurements, and often implement measurement circuits off-chip, increasing complexity and cost.
Innovation Solution
The integration of programmable circuitry and controllers within the integrated circuit to generate and measure propagation delays on-chip using programmable oscillators and delay paths with switchable stages and tuners, allowing for efficient measurement of central tendency and variance of propagation delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional test structures are used to measure propagation delays, then measurement capability is provided, but on-chip space is significantly occupied
Solution Approach 1:
The patent merges the test structure with the functional logic circuit itself, using the functional units (such as adders, multipliers, or other computational blocks) to simultaneously perform their intended computational function and serve as the measurement path for propagation delay. This eliminates the need for separate dedicated test structures, thereby preserving on-chip space while maintaining measurement capability.
Solution Approach 2:
The functional logic units are designed to serve dual purposes: performing their primary computational function during normal operation and serving as measurement paths for propagation delay characterization during testing. This multi-functionality approach allows the same circuit elements to provide both computational capability and measurement capability without requiring additional dedicated structures.
2Adaptability or versatility
If multiple test structures are implemented to obtain various delay measurements, then measurement versatility is improved, but device complexity and cost increase
Solution Approach 1:
The patent implements dynamic configurability in the measurement path by allowing selective activation of different functional units and measurement paths based on the type of delay measurement required. Control logic dynamically routes signals through different combinations of functional units depending on whether cell delay, wire delay, or combined delay measurements are needed, providing versatility without requiring all measurement paths to be permanently instantiated.
Solution Approach 2:
The measurement system is segmented into modular functional units that can be independently configured and activated. Each functional unit can be individually selected for measurement based on the specific delay type being measured, allowing the system to provide various measurement capabilities through selective combination of segments rather than requiring all segments to be simultaneously active or present.
3Measurement precision
If measurement circuits are implemented off-chip, then measurement capability is maintained, but implementation cost and complexity increase
Solution Approach 1:
The patent extracts the measurement functionality from external off-chip equipment and integrates it directly into the on-chip circuitry. The measurement circuits, including signal routing, timing capture, and delay calculation logic, are all implemented within the integrated circuit itself, eliminating the need for external measurement equipment and associated fixtures, thereby reducing implementation cost and simplifying the manufacturing process.
Solution Approach 2:
The integrated circuit performs its own self-characterization by incorporating all necessary measurement circuits and control logic on-chip. The device measures its own propagation delays using internally generated test signals and internal measurement paths, eliminating the need for external measurement equipment. This self-service approach reduces external dependencies and implementation costs.
Data Source
AI summary
Described herein are improved techniques for measuring propagation delay of an integrated circuit that facilitate performing propagation delay measurements on-chip. Some embodiments relate to an integrated circuit comprising programmable oscillator circuitry with a plurality of oscillator stages that are switchable into and out of a delay path based on control signals from a controller, allowing the same programmable oscillator to generate many different oscillator signals according to the received control signals, for the controller to determine a central tendency and/or variance of propagation delay of the integrated circuit. Some embodiments relate to an integrated circuit including programmable delay paths configured to provide an amount of cell delay and an amount of wire delay based on control signals from a controller, allowing the same programmable delay path to generate signals for measuring delays due to cell and wire delays of the integrated circuit.