Programmable Delay Path Timing Correlation for Silicon Delay Measurement
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Solution Overview
Problem
Existing techniques for measuring propagation delays in integrated circuits are costly and inefficient, as they require numerous on-chip test structures and off-chip measurement circuits, leading to increased space and complexity on the chip.
Innovation Solution
The development of integrated circuits with programmable circuitry and controllers that generate and manipulate oscillator signals to determine central tendencies and variances of propagation delay, using programmable ring oscillators and delay paths with switchable oscillator stages and tunable delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If numerous on-chip test structures and off-chip measurement circuits are used to measure propagation delays, then measurement accuracy is improved, but chip space requirements and device complexity increase
Solution Approach 1:
The patent combines the measurement circuit functionality directly into the on-chip test structures, eliminating the need for separate off-chip measurement circuits. The ring oscillator circuits are configured to generate measurement signals that can be read back through existing I/O interfaces, merging the measurement function with the test structure itself and reducing overall chip space requirements.
Solution Approach 2:
The patent designs test structures that serve multiple functions: they act as both the propagation delay test structures and the measurement circuit generators. The ring oscillators can be configured to generate various frequency signals for different measurement scenarios, and the same structures can measure both rise and fall times, providing universal measurement capability without requiring dedicated separate circuits.
2Measurement precision
If numerous on-chip test structures and off-chip measurement circuits are used to measure propagation delays, then measurement accuracy is improved, but device complexity increases
Solution Approach 1:
The patent merges the measurement control and signal generation functions into the on-chip test structures themselves. The ring oscillators are configured to automatically generate the measurement signals, and the existing I/O interfaces are used to read back the results, eliminating the need for complex external measurement equipment and reducing overall system complexity.
Solution Approach 2:
The test structures are designed to be self-measuring. The ring oscillators generate their own test signals and the same structures capture their own propagation delay measurements. This self-service capability eliminates the need for external measurement equipment and complex control systems, significantly reducing device complexity while maintaining measurement accuracy.
3Measurement precision
If programmable ring oscillators with switchable stages are used, then measurement flexibility and accuracy are improved, but circuit complexity increases
Solution Approach 1:
The ring oscillator is divided into multiple switchable stages, where each stage can be independently enabled or disabled through control signals. This segmentation allows the oscillator to be configured with different numbers of stages depending on the measurement requirements, providing measurement flexibility and accuracy while keeping the actual active circuit complexity low at any given time.
Solution Approach 2:
The oscillator circuit is made dynamic through the use of switchable stages that can be reconfigured based on measurement needs. The control signals dynamically enable or disable specific stages, allowing the circuit to adapt its complexity to the measurement task at hand, thereby improving measurement precision without permanently increasing circuit complexity.
Data Source
AI summary
An integrated circuit includes a programmable delay path comprising a plurality of path delay tuners configured to receive a plurality of control signals and add to the programmable delay path an amount of cell delay and an amount of wire delay that are based on the plurality of control signals. The integrated circuit further includes a controller configured to provide the plurality of control signals to the programmable delay path, receive a signal from the programmable delay path, and compare the signal to a reference signal.