Programmable Delay Circuit With PVT-Compensated RC Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing delay circuits are sensitive to process, voltage, and temperature variations, leading to significant differential nonlinearity and impracticality in modern chip and system designs.
Innovation Solution
A delay circuit comprising a capacitor and a triggering circuit, where the capacitance and triggering voltage are designed to be inversely affected by process variations, canceling out these effects, and a programmable delay circuit with a variable current source and edge detector, allowing for precise control of delay times without cascading multiple cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a standard inverter delay cell is used, then the circuit is simple to implement, but the delay variation is very sensitive to process, power supply voltage and ambient temperature variations (variation on the order of 50%)
Solution Approach 1:
The patent changes the operating parameters of the inverter cell by introducing a controlled discharge current through a current source and capacitor configuration. This transforms the delay mechanism from being purely inversion-based to being controlled by RC time constants, which are less sensitive to PVT variations when properly designed.
Solution Approach 2:
The patent introduces a capacitor as an intermediary energy storage element between the inverter and the output. This capacitor, combined with a controlled current source, mediates the delay function by creating a predictable RC discharge curve that is less sensitive to process variations than the inverter switching characteristics alone.
2Loss of time
If multiple inverter cells are cascaded to achieve required delay, then the delay time can be adjusted, but the delay step linearity deteriorates due to accumulation of delay error from each cell
Solution Approach 1:
The patent implements a programmable delay structure where the delay time can be dynamically adjusted by selecting different capacitor values or current source strengths. This dynamic control allows for optimization of delay steps while maintaining linearity through controlled discharge characteristics rather than relying on multiple cascaded cells.
Solution Approach 2:
The patent segments the delay function into controllable units using multiple capacitors that can be selectively connected or different current source configurations. This segmentation allows for programmable delay adjustment while maintaining consistent discharge characteristics across different delay settings, improving linearity.
3Reliability
If a self-biased current generator is used to reduce process variation, then process independence is improved, but temperature variation effects still require complicated calibration and the circuit remains susceptible to process variations
Solution Approach 1:
The patent employs a self-biased current generator that automatically adjusts its operating point based on process conditions. The circuit uses feedback mechanisms where the current generator self-regulates to maintain consistent discharge current despite process variations, eliminating the need for external calibration while maintaining temperature compensation.
Solution Approach 2:
The patent incorporates feedback mechanisms in the current generator design where the bias current is automatically adjusted based on the operating conditions. This feedback loop compensates for temperature and process variations without requiring external calibration, reducing both complexity and sensitivity to environmental changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces sensitivity to process variations and improves linearity, enabling more stable and efficient delay generation with reduced noise immunity and power consumption.
Implementation Method 1
The delay generated by the inverter delay cell 100 is dependent on the constant current IIC1 and the capacitor CIC1. Specifically, in operation, when the input signal to the inverter 110 goes high, the discharge time for the capacitor depends on the constant current IIC1 and the capacitor CIC1.
Implementation Method 2
The capacitance of the capacitor being dependent, at least in part, on the threshold voltage. The triggering voltage of the triggering circuit may also be dependent, at least in part, on the threshold voltage. Process variations may affect the threshold voltage of the transistor, and, in turn, may affect the individual portions of the delay circuit, such as changing the capacitance of the capacitor and changing the triggering voltage of the triggering circuit. Because the changes to the capacitance and the triggering voltage tend to work inversely to one another, the changes due to the process variations of the two portions tend to cancel one another out.
Data Source
AI summary
A delay circuit is described having a variable capacitor and a triggering circuit. The variable capacitor and the triggering circuit may both include transistors. With both the variable capacitor and the triggering circuit dependent on the threshold voltage, the delay circuit may be less sensitive to process variations. The delay circuit may also include a capacitor, a first triggering circuit, a second triggering circuit, and a pull down circuit. The capacitor may discharge at a first rate, triggering the first triggering circuit which, in turn, activates the pull down circuit to pull down the capacitor at a second rate that is faster than the first rate. The second triggering circuit is triggered as the capacitor is pulled down, thereby reducing the effect of input signal noise on the output of the delay circuit. The discharging of the capacitor may be adjusted by a control input thereby making the delay of the delay circuit programmable.


