Programmable Device Power Gating with State Preservation
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Solution Overview
Problem
Dynamic reconfigurable devices face significant power leakage issues, with existing power gating technologies losing internal states when power is cut off, leading to inefficient energy conservation and prolonged restart times.
Innovation Solution
A programmable device architecture that separates power supply routes between core logic units and configuration memories, allowing independent power control to cut off power to unused core logic units while maintaining internal states in configuration memories, enabling rapid power restoration and reduced energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power supply is cut off to a circuit block in wait state to conserve energy, then power consumption is reduced, but internal state is lost from SRAM and it is necessary to set configuration information again
Solution Approach 1:
The power supply system is segmented into two independent routes: one for the core logic unit and another for the configuration memory. This allows selective power gating where the core logic unit can be powered down while the configuration memory remains powered, enabling rapid restart without reconfiguration. The segmentation resolves the contradiction by allowing energy savings through selective power cutoff while preserving critical state information.
Solution Approach 2:
The configuration information is preliminarily loaded and stored in the configuration memory before power cutoff occurs. By maintaining power to the configuration memory, the system preserves the pre-loaded configuration data, so that when power is restored to the core logic unit, it can immediately resume operation without requiring time-consuming reconfiguration from external sources.
2Loss of energy
If power supply is cut off to core logic unit, then power consumption is reduced, but internal state is lost and cannot be restored
Solution Approach 1:
The configuration memory acts as an intermediary that stores and preserves the internal state information. When the core logic unit is powered down, the configuration memory maintains power and retains the configuration data. Upon power restoration, this intermediary component enables rapid state recovery by providing the stored configuration information to the core logic unit, thus resolving the contradiction between energy savings and state preservation.
3Loss of energy
If power supply is cut off to both core logic unit and configuration memory, then maximum power saving is achieved, but restart requires sequential reading from external storage which takes time
Solution Approach 1:
The power supply system is divided into separate controllable routes for the core logic unit and configuration memory. This segmentation enables differential power management where the configuration memory can remain powered while the core logic unit is powered down, achieving significant power savings while avoiding the performance penalty of external storage access during restart.
Solution Approach 2:
Different power management strategies are applied to different components based on their local requirements. The configuration memory receives continuous power to maintain its data, while the core logic unit receives intermittent power based on operational needs. This localized quality approach resolves the contradiction by optimizing power consumption for each component according to its specific function and state preservation requirements.
Data Source
AI summary
A programmable device operates at high speed while reducing power consumption. The programmable device includes a plurality of processing tiles each including a configuration memory and a core logic unit, a configuration control unit for programming them, and a power control unit for cutting off a power supply depending on an operating state. The power supply of the core logic unit is cut off after saving the internal state of the core logic unit in the configuration memory, and power is supplied again to the core logic unit before the internal state is restored from the configuration memory to the core logic unit, thus saving power while maintaining the internal state.