Programmable Element Block for Redundant Memory Mapping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing capacity of memory circuits leads to a surplus of redundant memory elements and associated programmable elements, resulting in wasted space and increased manufacturing complexity, as the number of defective memory locations is unpredictable, making it difficult to optimize the number of redundant memory elements.
Innovation Solution
A programmable element block with reduced numbers of programmable elements is used to map memory addresses to redundant memory, allowing for efficient association and access of redundant memory elements, while maintaining the number of redundant memory available for repair, by programming memory addresses and location information in sets of programmable elements and using shared redundant memory sections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of redundant memory elements is increased to accommodate unpredictable defective memory locations, then the reliability of memory repair is improved, but the integrated circuit area and manufacturing complexity increase
Solution Approach 1:
The patent makes the redundant memory elements and their associated programmable elements serve multiple purposes: they function as both spare memory locations for repairing defective cells and as programmable address mapping resources. By enabling the redundant memory sections to be dynamically programmed and mapped to main memory addresses, the system eliminates the need for dedicated spare programmable elements for each redundant memory element, thereby reducing overall circuit area while maintaining repair capability
Solution Approach 2:
The patent combines the redundant memory elements with the main memory array into a unified memory structure, where the same physical memory cells serve dual purposes: as part of the main memory when functional and as replaceable spares when defective locations are identified. This merging eliminates the need for separate, permanently allocated redundant memory sections, reducing total memory capacity requirements and circuit area
2Reliability
If the number of redundant memory elements is increased to ensure adequate memory repair coverage, then the reliability of memory repair is improved, but the manufacturing complexity increases
Solution Approach 1:
The redundant memory elements share the same programmable elements and control logic with the main memory array, eliminating the need for separate programming circuits and control pathways for each redundant element. This universal approach reduces manufacturing complexity by standardizing the memory structure while maintaining the ability to program and activate redundant locations as needed
Solution Approach 2:
The patent implements dynamic programming of redundant memory elements, where the programmable elements are programmed after manufacturing based on actual defect testing results rather than being pre-configured. This dynamic approach allows the system to adapt to the actual number and location of defects, optimizing the use of redundant elements and reducing manufacturing complexity by avoiding over-provisioning
3Reliability
If more redundant memory elements are provided to handle unpredictable defects, then the reliability of memory repair is improved, but the quantity of memory resources is wasted
Solution Approach 1:
The system dynamically determines the number and configuration of redundant memory elements based on actual defect testing performed on each memory chip. Rather than providing a fixed number of redundant elements for all chips, the programmable elements are configured after testing to match the exact number of defects found, ensuring that redundant memory resources are precisely matched to actual needs and minimizing waste
Solution Approach 2:
The same memory cells serve dual purposes: as main memory locations when functional and as redundant spare locations when defective. This multi-functionality ensures that every memory cell contributes to either primary storage or repair capability, eliminating wasted resources while maintaining adequate redundancy for repair
Data Source
AI summary
Apparatuses and methods related to redundant memory and mapping memory addresses to redundant memory are disclosed. An example apparatus includes a plurality of memory sections and a plurality of redundant memory sections. A programmable element block includes a plurality of programmable element sets. A programmable element set is configured to be programmed with location information for a redundant memory section of the plurality of redundant memory sections and further programmed with a respective memory address to be mapped to a redundant memory element of the redundant memory section located by the location information. A programmable element block logic is configured to associate a memory address programmed in a programmable element set with a redundant memory element of the redundant memory section located by the respective location information programmed in the programmable element set.