Programmable HSSI Channel Layout With Shared PLLs for Multi-Protocol PLDs
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Solution Overview
Problem
The challenge lies in creating a programmable logic device (PLD) with high-speed serial interface (HSSI) circuitry that can efficiently support multiple high-speed serial communication standards and protocols without being wasteful or uneconomical, as including numerous HSSI circuits is impractical and manufacturing multiple versions of PLD circuitry contradicts the economy of scale.
Innovation Solution
The implementation of a four-channel high-speed serial interface module with programmable physical medium attachment (PMA) and physical coding sub-layer (PCS) channel circuits, along with a phase-locked loop (PLL) circuit, arranged in a linear configuration, allowing for flexible configuration to support various HSSI standards and protocols, thereby enhancing resource utilization and area efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a large number of different HSSI circuits are included on a PLD to support multiple communication standards, then the ability to support diverse protocols is improved, but the device complexity and manufacturing cost increase significantly
Solution Approach 1:
The patent implements a universal HSSI circuit design that can be programmed to support multiple communication standards and protocols. Instead of including separate dedicated circuits for each standard, a single programmable circuit structure is provided that can be configured through programming to meet different protocol requirements, thereby supporting diverse standards without proportionally increasing hardware complexity
Solution Approach 2:
The patent employs programmable logic device technology that allows the HSSI circuitry to be dynamically reconfigured to meet different application needs. The circuit can be programmed after manufacturing to support various standards, providing adaptability without requiring multiple fixed circuit versions to be manufactured
2Adaptability or versatility
If multiple versions of PLD circuitry are manufactured with different HSSI circuitry for different standards, then each version can be optimized for its specific protocol, but the economy of scale benefit is lost
Solution Approach 1:
The patent creates a single universal PLD circuit design that can be manufactured in large volumes at low cost. This universal design includes programmable HSSI circuitry that can be configured to support different protocols, eliminating the need to manufacture multiple versioned circuits while still providing protocol-specific functionality through programming
3Area of stationary object
If four PMA channel circuits are arranged in a linear configuration sharing a common PLL, then area efficiency is improved, but the potential for simultaneous operation of all channels is limited
Solution Approach 1:
The patent segments the clock generation function by providing separate PLL circuits for different channel groups. Specifically, first and second PLL circuits are provided for first and second groups of PMA channel circuits respectively, allowing independent clock control and simultaneous operation of multiple channels while maintaining compact linear arrangement of the PMA circuits
Data Source
AI summary
One embodiment relates to an integrated circuit having a plurality of four-channel serial interface modules. Each of the plurality of four-channel serial interface modules includes a first physical medium attachment (PMA) channel circuit, a second PMA channel circuit adjacent to the first PMA channel circuit, a third PMA channel circuit adjacent to the second PMA channel circuit, a fourth PMA channel circuit adjacent to the third PMA channel circuit, and at least one phase-locked loop (PLL) circuit which is programmably coupled to each of the first, second, third and fourth PMA channel circuits. Other embodiments and features are also disclosed.