Programmable IC Power-Domain Reset for Fault Isolation
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Solution Overview
Problem
In programmable integrated circuits (ICs), particularly field programmable gate arrays (FPGAs), existing solutions lack effective mechanisms to independently reset processing and programmable logic sub-systems in response to power failures, leading to potential data corruption and system instability.
Innovation Solution
A programmable IC is designed with a safety sub-system that independently monitors and resets either the processing sub-system or the programmable logic sub-system based on power failure detection, ensuring continued operation of the user design by isolating errors and preventing cross-sub-system interference during resets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a power failure occurs in the processing sub-system, then the processing sub-system must be reset to restore functionality, but resetting the entire IC would cause loss of operation in the programmable logic sub-system and potential data corruption
Solution Approach 1:
The IC is divided into separate power domains - a first power domain for the processing sub-system and a second power domain for the programmable logic sub-system. This segmentation allows independent power management and resetting of each sub-system without affecting the other, enabling the processing sub-system to be reset while maintaining continuous operation of the programmable logic sub-system.
2Reliability
If a power failure occurs in the programmable logic sub-system, then the programmable logic sub-system must be reset to restore functionality, but resetting the entire IC would cause loss of operation in the processing sub-system and potential data corruption
Solution Approach 1:
The IC is divided into separate power domains - a first power domain for the processing sub-system and a second power domain for the programmable logic sub-system. This segmentation allows independent power management and resetting of each sub-system without affecting the other, enabling the programmable logic sub-system to be reset while maintaining continuous operation of the processing sub-system.
3Reliability
If the entire IC is reset in response to a power failure in one sub-system, then system stability is restored, but operation in the other sub-system is interrupted and data corruption may occur
Solution Approach 1:
The IC is divided into separate power domains - a first power domain for the processing sub-system and a second power domain for the programmable logic sub-system. This segmentation allows independent power management and resetting of each sub-system without affecting the other, enabling error isolation while preventing data corruption through selective resetting.
Data Source
AI summary
A programmable IC is disclosed that includes a programmable logic sub-system, a processing sub-system, and a safety sub-system. The programmable logic circuits in the programmable logic sub-system are configured to form a set of circuits indicated in a set of configuration data. The processing sub-system also executes a software program included in the set of configuration data. The programmable logic sub-system and the processing sub-system are independently powered. In response to a power failure of the processing sub-system and continued power to the programmable logic sub-system, the safety sub-system resets only the processing sub-system. In response to a power failure of the programmable logic sub-system and continued power to the processing sub-system, the safety sub-system resets only the programmable logic sub-system.


