Programmable Peripheral Interconnect for Direct Event-Task Mapping
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Solution Overview
Problem
Existing peripheral communication systems in microcontroller systems are slow and inefficient, requiring the processor to wake up and handle communications between peripherals, leading to unpredictable timings and increased energy consumption.
Innovation Solution
A programmable peripheral interconnect (PPI) that maps events from one peripheral to tasks in another peripheral, allowing direct communication without processor intervention, using memory-mapped registers to establish channels and enable/disable connections efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the processor handles all peripheral communications directly, then communication reliability is maintained, but communication speed decreases and energy consumption increases
Solution Approach 1:
The system segments communication handling into two parts: the processor handles configuration and high-level control, while the PPI handles direct peripheral-to-peripheral communication. This segmentation allows the processor to remain in sleep mode during routine peripheral communications, reducing energy consumption while maintaining communication speed through the dedicated PPI pathway.
Solution Approach 2:
The PPI acts as an intermediary device between peripherals, enabling direct communication without processor intervention. The PPI receives event signals from one peripheral, consults its mapping table, and triggers the corresponding task in the target peripheral, thereby speeding up communication and reducing processor energy consumption.
2Reliability
If the processor handles all peripheral communications, then communication accuracy is ensured, but communication timing becomes unpredictable
Solution Approach 1:
The PPI is pre-configured with a mapping table that defines event-to-task relationships between peripherals. This preliminary configuration allows the PPI to immediately execute the correct task when an event occurs, eliminating the need for the processor to wake up and determine the appropriate action, thus ensuring predictable communication timing while maintaining reliability.
3Use of energy by moving object
If direct peripheral communication is enabled without processor involvement, then energy consumption is reduced, but system complexity increases
Solution Approach 1:
The PPI is designed as a universal interconnect device that can handle multiple peripheral communication channels simultaneously. It maintains a mapping table that can accommodate various event-to-task relationships across different peripherals, providing a multi-functional solution that reduces energy consumption without requiring separate dedicated circuits for each peripheral pair, thereby controlling system complexity.
4Adaptability or versatility
If a mapping table is stored in memory for peripheral communication, then communication flexibility is improved, but memory access time increases
Solution Approach 1:
The mapping table is pre-configured in memory during system initialization or firmware loading, storing the relationships between peripheral events and target tasks. This preliminary action allows the PPI to quickly retrieve the appropriate task mapping when an event occurs, providing communication flexibility while minimizing runtime memory access delays.
Data Source
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AI summary
Peripherals(18, 20, 22, 24, 26) are connected to a processor (6) and a programmable peripheral interconnect (10) is connected to each peripheral. One of the peripherals (18) is configured to signal an event to the interconnect, and one of the peripherals (20) is configured to respond to a task signal from the interconnect by performing a task. The task-receiving peripheral (20) has a task register (40), addressable by the processor (6), and performs the task in response to a change in the contents of the register (40). The interconnect (10) accesses a memory (14) in which a mapping is stored between an event of a first peripheral (18) and a task of a second peripheral (20), the mapping comprising (i) an identification of the event, and (ii) the address of a task register (40). The mapping causes the interconnect (10) to provide a channel by sending a task signal to the second peripheral (20) in response to a signal of the event from the first peripheral (18).