Programmable-Resistor Memory Cells for Compact Non-Volatile Storage
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Solution Overview
Problem
Existing memory devices face challenges in achieving high storage density and efficiency, particularly in non-volatile memory devices that require simplified fabrication processes and compact form factors while maintaining data retention without power.
Innovation Solution
The integration of programmable resistors and control transistors, utilizing the same components as MOSFETs, allows for simplified fabrication and compact design, with programmable resistors storing data by adjusting resistance through voltage application and read via current sensing, enabling non-volatile memory cell operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If non-volatile memory devices are used to retain data without power, then data retention capability is improved, but device speed deteriorates
Solution Approach 1:
The memory device is segmented into distinct functional blocks: volatile memory blocks for high-speed data access and non-volatile memory blocks for data retention. This segmentation allows the system to leverage the speed advantage of volatile memory while maintaining the data retention capability of non-volatile memory, effectively resolving the contradiction between speed and data retention.
Solution Approach 2:
The memory device implements multi-functionality by integrating both volatile and non-volatile memory capabilities within a single device architecture. The controller manages data distribution between volatile and non-volatile blocks, enabling the device to perform both high-speed access and long-term data retention functions simultaneously, thus achieving both speed and data retention requirements.
2Quantity of substance
If storage density is increased to meet growing demands, then quantity of stored data is improved, but device complexity increases
Solution Approach 1:
The memory device is divided into multiple independent memory blocks (both volatile and non-volatile) that can be independently managed. This segmentation allows for scalable storage density increases without proportionally increasing overall device complexity, as each block operates semi-independently with standardized interfaces managed by the controller.
Solution Approach 2:
The controller acts as an intermediary that manages data operations across multiple memory blocks. It handles the complexity of coordinating between volatile and non-volatile blocks, enabling high storage density while abstracting the complexity from the user interface. The controller intelligently distributes data across blocks based on access patterns and retention requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances storage density and facilitates a compact, non-volatile memory cell design with efficient data retention, simplifying the fabrication process and enabling independent bit data storage through programmable resistors.
Implementation Method 1
Each programmable resistor includes a gate structure and one or more source/drain structures for forming a transistor. A resistance of the programmable resistor may be set by applying a voltage to the gate structure
Implementation Method 2
Data stored by the programmable resistor can be read by sensing current through the programmable resistor
Data Source
AI summary
Disclosed herein are related to a memory cell including one or more programmable resistors and a control transistor. In one aspect, a programmable resistor includes a gate structure and one or more source/drain structures for forming a transistor. A resistance of the programmable resistor may be set by applying a voltage to the gate structure, while the control transistor is enabled. Data stored by the programmable resistor can be read by sensing current through the programmable resistor, while the control transistor is disabled. In one aspect, the one or more programmable resistors and the control transistor are implemented by same type of components, allowing the memory cell to be formed in a compact manner through a simplified the fabrication process.