Programmable SoC Partitions With NoC Data Path Isolation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Modern programmable integrated circuits (ICs) face challenges in efficiently integrating heterogeneous subsystems, such as fixed-function components and programmable logic, to achieve optimal area, power, and performance while maintaining flexibility and isolating applications within different partitions.

Innovation Solution

An integrated programmable device platform that includes programmable logic circuitry, a processor system, and a network-on-chip (NoC) which is programmable to establish user-specified data paths, along with a platform management controller to configure these components, allowing for flexible resource allocation and secure remapping of functions across subsystems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If heterogeneous subsystems are integrated in modern programmable ICs, then functionality and performance are improved, but device complexity and area utilization become challenging

Engineering Contradiction:
ImprovefunctionalityVSAvoidintegration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The device is divided into distinct heterogeneous subsystems including programmable logic circuitry, processor system, and network-on-chip, each with specialized functions. This segmentation allows independent optimization of each subsystem while maintaining overall system functionality through the interconnect fabric.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The network-on-chip serves as a universal interconnect that can dynamically route data between any combination of subsystems (programmable logic, processor, memory, I/O). This multi-functional interconnect resolves complexity by providing a single standardized communication interface for all heterogeneous components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If fixed-function components are added to programmable logic, then performance is improved, but area efficiency and power consumption become trade-offs

Engineering Contradiction:
ImproveperformanceVSAvoidarea efficiency
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

Fixed-function components (processor system, network-on-chip) are strategically placed in specific regions of the device, while programmable logic occupies other regions. This local specialization allows high-performance fixed functions where needed while maintaining area efficiency through optimized spatial distribution.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The device merges fixed-function components with programmable logic into a unified system where both types of circuitry share common resources (interconnect, power distribution, control logic). This merging improves area efficiency compared to separate devices while maintaining the performance benefits of fixed-function elements.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If multiple applications are executed concurrently in different partitions, then productivity is improved, but isolation and security become challenging

Engineering Contradiction:
Improveconcurrent executionVSAvoidisolation and security
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The device is partitioned into separate regions (programmable logic partition, processor system partition, network-on-chip partition) that can be independently configured and accessed. This physical and logical segmentation enables concurrent application execution while providing natural isolation boundaries for security and reliability.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11683038B1Adaptive integrated programmable device platform
Publication Date: 2023.06.20 XILINX INC
  • US11683038B1 patent drawing
  • US11683038B1 patent drawing
  • US11683038B1 patent drawing

AI summary

A System-on-Chip includes a first partition configured to implement a first application using of at least a first portion of one or more of a plurality of subsystems of the System-on-Chip and a second partition configured to implement a second application concurrently with the first partition. The second application uses at least a second portion of one or more of the plurality of subsystems. The first partition is isolated from the second partition.