Progressive Image Data Loading with Pre-Allocated Memory Addresses
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Solution Overview
Problem
Current methods for loading 2D or 3D image data into memory are inefficient, particularly in volume rendering applications, leading to high memory access and consumption due to network bandwidth limitations and the need for frequent memory allocation during progressive loading.
Innovation Solution
An integrated progressive volume loading approach where image data sections are progressively loaded into memory, with each section stored at addresses corresponding to its original location, eliminating the need for temporary memory allocation and reducing memory access by maintaining a full resolution memory allocation throughout the loading process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If image data sections are progressively loaded into memory using traditional methods, then the display can show preview images, but memory access and memory consumption increase due to frequent reallocation and temporary storage requirements
Solution Approach 1:
The patent applies preliminary action by pre-allocating the full resolution memory allocation (25) before progressive loading begins. This eliminates the need for temporary memory allocation during the loading process, as the memory structure is prepared in advance to accommodate all image data sections (21, 22, 23, 24) as they are progressively loaded from network storage (26) into the second memory (25).
Solution Approach 2:
The patent segments the image data into multiple sections (21, 22, 23, 24) that can be progressively loaded in iterations. Each section corresponds to a specific resolution level, allowing the system to load and display preview images incrementally while maintaining efficient memory access patterns through the pre-established memory structure.
2Productivity
If traditional progressive loading methods are used, then image data can be loaded step by step, but network bandwidth limitations cause inefficiency and high memory access requirements
Solution Approach 1:
The system performs preliminary action by pre-defining the memory structure and allocation strategy before loading begins. This allows optimized data transfer patterns where image data sections are loaded in a sequence that maximizes network bandwidth utilization and minimizes memory access overhead, rather than reacting to memory constraints during loading.
Solution Approach 2:
The patent maintains continuity of useful action by ensuring that the progressive loading process continuously writes data to the pre-allocated memory structure without interruption or reallocation. The loading iterations proceed smoothly from one resolution level to the next, keeping the memory access pattern continuous and efficient throughout the entire loading process.
Data Source
Figure 1
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Figure 5a~5d
AI summary
The invention relates to a method and a corresponding system and apparatus for loading image data stored in a first memory (23) into a second memory (25) by loading at least a first set of sections (S1, S5, S9, S13) of the image data into the second memory (25). In order to achieve a reduced memory access and memory consumption during loading, said sections (S1, S5, S9, S13) of said first set of sections (S1, S5, S9, S13) of the image data being allocated to first original addresses (1, 5, 9, 13) in the first memory (23), wherein said sections (S1, S5, S9, S13) of said first set of sections (S1, S5, S9, S13) of the image data stored in the first memory (23) are spaced from one another, and said sections (S1, S5, S9, S13) of said first set of sections (S1, S5, S9, S13) of the image data stored in the first memory (23) are progressively loaded into the second memory (25) and stored at first end addresses (1', 5', 9', 13') in the second memory (25), wherein said first end addresses (1', 5', 9', 13') of said sections (S1, S5, S9, S13) of said first set of sections (S1, S5, S9, S13) stored in the second memory (25) correspond to said first original addresses (1, 5, 9, 13) of said sections (S1, S5, S9, S13) of said first set of sections (S1, S5, S9, S13) stored in the first memory (23).