Protective Metal Cap for Raised Source/Drain Integrity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
During the chemical-mechanical polish (CMP) process in semiconductor device fabrication, the exposed raised sources and drains are vulnerable to damage from acid etchants used to remove the dummy gate, which can affect the material integrity of these regions.
Innovation Solution
A protective metal cap is formed on the raised source/drain regions before removing the dummy gate, and a gate dielectric layer is deposited on this cap, allowing for the replacement metal gate to be formed without harming the raised source/drain regions, followed by removal of the cap and dielectric layer to achieve a polished surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the dummy gate is removed using acid etchants after CMP, then the dummy gate structure is eliminated, but the raised sources and drains are damaged by the acid
Solution Approach 1:
A protective cap is formed on the raised source/drain regions before the dummy gate removal process. This preliminary protective action ensures that when acid etchants are subsequently applied to remove the dummy gate, the raised sources and drains are already shielded and cannot be damaged by the acid.
Solution Approach 2:
The protective cap acts as an intermediary barrier between the acid etchant and the raised source/drain regions. This intermediate layer allows the dummy gate removal process to proceed while preventing direct contact between the harmful acid and the sensitive semiconductor structures.
2Ease of operation
If the raised sources and drains are exposed during CMP, then the dummy gate can be accessed for removal, but the raised sources and drains become vulnerable to acid damage
Solution Approach 1:
The protective cap is applied in advance to counteract the harmful effect of acid exposure. By establishing this protective barrier before the dummy gate removal process begins, the raised sources and drains are pre-protected against the harmful acid etching that would otherwise occur during dummy gate removal.
Solution Approach 2:
The protective cap serves as an intermediary protective layer that allows acid to be applied for dummy gate removal while preventing the acid from reaching and damaging the raised source/drain regions.
3Reliability
If a protective cap is formed on the raised sources and drains, then the raised sources and drains are protected from acid damage, but additional process steps are required
Solution Approach 1:
The protective cap is formed using the same metal deposition process that will later be used to form the replacement gate. This multi-functional approach means that while a protective cap is added, it can be removed using the same CMP process that will eventually be used for gate planarization, thereby offsetting some of the additional process complexity.
Solution Approach 2:
The protective cap is designed as a temporary structure that is discarded after serving its protective function. The cap is removed via CMP after the replacement gate is formed, and this removal process also serves to planarize the gate surface, thereby recovering some process efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively protects the raised source/drain regions from damage during dummy gate removal and enables a smooth transition to the replacement metal gate, ensuring the integrity and performance of the semiconductor device.
Implementation Method 1
a protective metal cap is formed on the raised source/drain regions before removing the dummy gate
Implementation Method 2
a gate dielectric layer is deposited on the protective cap and the ETSOI
Implementation Method 3
An etch process employing at least one acid is used to remove the dummy gate from the ETSOI
Implementation Method 4
at least two raised source/drain regions are epitaxially formed adjacent to the dummy gate
Data Source
AI summary
In a method of fabricating a semiconductor device, a silicon-on-insulator (SOI) substrate is provided. This SOI substrate comprises a buried oxide layer and an ETSOI layer between the buried oxide layer and a surface of the SOI substrate. A dummy gate is formed on the ETSOI. At least two raised source/drain regions are epitaxially formed adjacent to the dummy gate, and a protective cap is formed thereon. An etch process employing at least one acid is used to remove the dummy gate from the ETSOI. A gate dielectric layer is deposited on the protective cap and the ETSOI after removing the dummy gate. A replacement metal gate is then formed on the gate dielectric layer to replace the removed dummy gate, the gate dielectric layer is removed from the protective metal cap, and the protective cap is removed from the raised source/drain regions.