Curve-Fitting Proximity Effect Parameters for Non-Rectangular Transistors

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Solution Overview

Problem

Current device models fail to accurately account for sub-wavelength lithographic distortions in non-rectangular semiconductor structures, affecting the electrical characteristics of transistor devices such as threshold voltage and leakage current due to complex nonlinear relationships with gate shape.

Innovation Solution

A curve-fitting procedure is employed to determine proximity effect device parameters using location-dependent weighting factors for accurate extraction of equivalent gate length (EGL) in non-rectangular semiconductor structures, incorporating two-dimensional and three-dimensional device simulations to improve the accuracy of electrical characteristic estimation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional device models are used for sub-wavelength lithographic patterns, then manufacturing process is simple, but manufacturing precision deteriorates due to inaccurate electrical characteristic estimation

Engineering Contradiction:
Improveelectrical characteristic estimation accuracyVSAvoiddevice model complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent transforms the complex 3D non-rectangular gate structure into an equivalent 2D rectangular structure by introducing an equivalent gate length parameter. This parameter transformation allows conventional 2D device models to accurately represent 3D structures, improving electrical characteristic estimation without requiring complex 3D models

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a simplified 2D copy of the 3D non-rectangular gate structure that preserves the essential electrical characteristics. By extracting an equivalent gate length from the 3D structure and using it in a 2D model, the system replicates the electrical behavior accurately while avoiding the complexity of full 3D modeling

Inventive Principle:
Principle #26Copying

2Measurement precision

If 3D device simulations are performed for non-rectangular structures, then electrical characteristic accuracy is improved, but computational complexity and processing time increase significantly

Engineering Contradiction:
Improveelectrical characteristic measurement accuracyVSAvoidsimulation processing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent reduces the problem from three dimensions to two dimensions by projecting the 3D non-rectangular gate structure onto a 2D plane and extracting an equivalent gate length. This dimensional reduction enables the use of faster 2D device models while maintaining accuracy, avoiding the computational burden of full 3D simulations

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If conventional EGL extraction methods are used, then extraction process is simple, but accuracy deteriorates with a relative difference of 40% between 2D and 3D simulations

Engineering Contradiction:
Improveequivalent gate length extraction accuracyVSAvoidextraction method complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the non-rectangular gate structure into rectangular regions and applies weighting factors to each segment. This segmentation approach allows accurate extraction of the equivalent gate length by considering the contribution of each segment, achieving high accuracy without requiring complex iterative optimization methods

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10007752B2Determining proximity effect parameters for non rectangular semiconductor structures
Publication Date: 2018.06.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10007752B2 patent drawing
  • US10007752B2 patent drawing
  • US10007752B2 patent drawing

AI summary

The present disclosure relates to a curve-fitting procedure for determining proximity effect device parameters in semiconductor fabrication. Methods presented herein are adapted to determine the impact of narrow width related effects on device characteristics by comparing two-dimensional (2D) and/or three-dimensional (3D) device simulations. Methods presented herein are adapted to determine the accuracy of conventional extraction methods utilizing non-rectangular gate device simulation.