Pseudo Power Supply Wiring with Parallel MOSFETs for Fast Wake-Up
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Solution Overview
Problem
Semiconductor devices face challenges in reducing power consumption during standby states while maintaining switching speed due to sub-threshold currents and the limitations of using pseudo power supply wirings with P-channel MOS transistors.
Innovation Solution
The use of both N-channel and P-channel MOS transistors in parallel between the main and pseudo power supply wirings, where the N-channel transistor has a sufficient drive capability for active states and the P-channel transistor is reverse-biased for standby, allowing for reduced power consumption without delaying switching speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a P-channel MOS transistor is used to connect the main power supply wiring and pseudo power supply wiring, then power consumption is reduced in standby state, but switching speed to active state is delayed
Solution Approach 1:
The patent combines both an N-channel MOS transistor and a P-channel MOS transistor in parallel between the main power supply wiring and pseudo power supply wiring. The N-channel transistor provides fast switching capability while the P-channel transistor provides low standby current, merging the advantages of both transistor types to simultaneously achieve fast switching and low power consumption.
Solution Approach 2:
The patent changes the electrical parameters of the parallel transistor configuration by setting different threshold voltages and drive capabilities for the N-channel and P-channel transistors. The N-channel transistor is designed with higher drive capability for fast switching, while the P-channel transistor is designed with lower standby current, creating a parameter-optimized hybrid system.
2Use of energy by moving object
If the operating voltage is decreased to reduce power consumption, then power consumption is reduced, but sub-threshold current increases
Solution Approach 1:
The patent converts the harmful sub-threshold current effect into a beneficial low-power mechanism by using the P-channel MOS transistor's naturally lower off-state current characteristics. The P-channel transistor's higher threshold voltage relative to the low operating voltage works in favor of reducing leakage, transforming what would normally be a problematic parameter into an advantage for power savings.
3Use of energy by moving object
If only a P-channel MOS transistor is used between main and pseudo power supply wirings, then standby power is reduced, but drive capability for active state is insufficient
Solution Approach 1:
The patent merges the drive capability of an N-channel MOS transistor with the standby power reduction of a P-channel MOS transistor in a parallel configuration. This combination allows the system to achieve both high drive capability during active state (provided by the N-channel transistor) and low standby power consumption (provided by the P-channel transistor's higher threshold voltage).
Data Source
AI summary
A semiconductor device includes main power supply wirings VDD and VSS, an pseudo power supply wiring VDT, inverters connected between the pseudo power supply wiring VDT and the main power supply wiring VSS, and inverters connected between the main power supply wiring VDD and the main power supply wiring VSS. Between the main power supply wiring VDD and the pseudo power supply wiring VDT, an N-channel MOS transistor and a P-channel MOS transistor that are rendered a conductive state at the time of active are connected in parallel. According to the present invention, the transistors different in conductivity type are used in parallel, and thus, it becomes possible to reduce power consumption at the time of standby while suppressing a decrease in switching speed from a standby state to an active state.