Programmable Switching Interconnect for Fine-Grained PSoC Routing
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Solution Overview
Problem
Conventional programmable logic devices (PLDs) and Field-Programmable Gate Arrays (FPGAs) face challenges such as high power consumption and large silicon area, and current Programmable System on Chip (PSoC) architectures provide only coarse-grained digital programmability with limited options, making it difficult to efficiently implement a variety of peripherals and optimize resource usage in complex electronic systems.
Innovation Solution
A Programmable System on Chip (PSoC) with a Universal Digital Block (UDB) array and a system-level interconnect matrix that allows dynamic reconfiguration of connections between digital and analog peripherals and I/O pins, enabling flexible routing and efficient use of chip resources by connecting any functional element to any I/O pin or other elements, with programmable logic devices and datapath sections forming an arithmetic sequencer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional PLDs and FPGAs are used to implement multiple peripherals, then functional versatility is improved, but power consumption and silicon area increase significantly
Solution Approach 1:
The patent combines multiple fixed-function peripherals (UART, SPI, I2C, PWM, ADC, DAC, timers, counters) and programmable logic into a single integrated PSoC device. This merging eliminates the need for separate discrete components, reducing overall power consumption while maintaining functional versatility through shared resources and integrated architecture.
Solution Approach 2:
The PSoC device implements universal peripherals that can perform multiple functions. For example, the same I/O pins can be configured for different communication protocols (UART, SPI, I2C), and the programmable logic can be reconfigured to implement various digital functions. This multi-functionality reduces the total component count and power consumption compared to using dedicated devices for each function.
2Adaptability or versatility
If conventional PLDs and FPGAs are used to implement multiple peripherals, then functional versatility is improved, but silicon area increases significantly
Solution Approach 1:
The patent merges multiple peripheral functions and programmable logic into a single integrated circuit chip. By combining UART, SPI, I2C, PWM, ADC, DAC, timers, counters, and programmable logic blocks into one device, the total silicon area is dramatically reduced compared to implementing each function in separate PLDs or FPGAs.
Solution Approach 2:
The PSoC architecture nests programmable logic blocks within the integrated circuit, allowing them to be embedded alongside fixed-function peripherals. This nested arrangement enables efficient use of silicon area by sharing common resources such as I/O pins, clock networks, and power distribution, rather than requiring separate dedicated areas for each function.
3Adaptability or versatility
If current PSoC architectures are used, then integration of digital and analog blocks is improved, but programmability is limited to coarse-grained with few fixed functions
Solution Approach 1:
The patent implements dynamic reconfiguration capability that allows the system to switch between different operational modes and connect different functional blocks to different I/O pins in real-time. This dynamic programmability enables fine-grained control over system behavior, allowing users to customize the interconnect matrix and peripheral configurations beyond the limitations of coarse-grained fixed functions.
Solution Approach 2:
The PSoC device is segmented into multiple independent functional blocks (UART, SPI, I2C, PWM, ADC, DAC, timers, counters, programmable logic) that can be individually configured and connected through a programmable interconnect matrix. This segmentation allows each block to be programmed and configured independently, providing fine-grained programmability while maintaining tight integration between digital and analog components.
4Adaptability or versatility
If additional peripheral units are implemented in complex electronic systems, then functional capabilities are improved, but space requirements, production complexity, and power consumption increase
Solution Approach 1:
The patent merges multiple peripheral units into a single integrated PSoC device, eliminating the need for separate discrete components. This integration simplifies the bill of materials, reduces assembly steps, and lowers production complexity while maintaining enhanced functional capabilities through the device's multiple built-in peripherals and programmable logic.
Data Source
AI summary
Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals. A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers.