Pulse Width Calibration for Multi-Chip Signal Distortion
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Solution Overview
Problem
Process variation in semiconductor transistors leads to signal distortion during communication between chips in multi-chip systems, necessitating an innovative signal monitoring and calibration design to address this issue.
Innovation Solution
A multi-chip system with a monitoring and calibration system that estimates and records pulse widths of input signals, calibrating chip settings to mitigate signal distortion by identifying and modifying settings of chips that fail to meet distortion requirements through a pulse width monitoring and calibration method.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If chips are connected in series to increase computing power, then processing capability is improved, but signal distortion increases due to process variation
Solution Approach 1:
The patent implements preliminary pulse width calibration by measuring and adjusting pulse widths before actual computing operations begin. The system pre-characterizes each chip's pulse width variations and stores calibration data, so when chips are connected in series, the signal distortion has already been compensated for, enabling reliable high-speed communication across multiple chips without real-time intervention
Solution Approach 2:
The patent changes the pulse width parameter dynamically based on measured variations. By adjusting pulse width values according to each chip's characteristics and the cumulative effect of series connections, the system compensates for signal distortion. The calibration process measures actual pulse widths and modifies timing parameters to maintain signal integrity across extended chip chains
2Reliability
If pulse width calibration is performed for each chip, then signal distortion is reduced, but system complexity increases
Solution Approach 1:
The patent implements self-service calibration where each chip autonomously measures its own pulse width characteristics and applies its own calibration adjustments. The system includes on-chip measurement circuits that automatically characterize pulse widths without requiring external test equipment or complex centralized control, thereby reducing overall system complexity while maintaining signal quality
Solution Approach 2:
The patent employs feedback mechanisms where pulse width measurements from actual operations are used to refine calibration data. The system continuously monitors signal quality and adjusts calibration parameters based on measured deviations, creating a closed-loop system that automatically compensates for variations without requiring complex manual intervention or overly sophisticated control algorithms
Data Source
AI summary
A multi-chip system includes a plurality of chips and a monitoring and calibration system. The plurality of chips include at least a first chip and a second chip, wherein an output port of the first chip is connected to an input port of the second chip via a chip-to-chip connection, the first chip transmits an output signal to the second chip via the chip-to-chip connection, and the second chip processes an input signal that is derived from the output signal transmitted via the chip-to-chip connection. The monitoring and calibration system calibrates a chip setting of at least one of the first chip and the second chip for pulse width calibration of the input signal.