Pulse Width Decoder Using Delayed Sampling for Low-Power Reception

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Solution Overview

Problem

Current data transmission methods require high power consumption due to the need for explicit clock signals in receiver devices, particularly in wireless serial data transmission systems like UHF passive RFID tags, which use high frequency oscillators to decode binary symbols.

Innovation Solution

A low-power pulse width coding scheme that eliminates the need for a high frequency clock signal by using a decoding mechanism created from the encoded signal itself, where binary symbols are represented by square waves with specific periods and duty cycles, allowing decoding without a clock signal through delayed sampling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pulse width coding is used with a high frequency clock signal to decode binary symbols, then decoding accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The encoded signal itself is used to generate the decoding signal through a delay element, eliminating the need for an external high frequency clock signal. The system serves itself by using its own transmitted signal as the reference for decoding, thereby reducing power consumption while maintaining decoding accuracy.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

A delay element is introduced as an intermediary component that creates the decoding signal from the encoded signal. This intermediary mechanism allows the system to avoid using a high power consuming clock signal while still achieving accurate decoding through delayed sampling.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If an explicit clock signal is used for data extraction in the receiver device, then data transmission reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidreceiver device complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The clock signal function is extracted and eliminated from the receiver device by using the encoded signal itself to generate the decoding signal. This removes the need for separate clock circuitry and high frequency oscillators, simplifying the receiver device while maintaining reliable data extraction through the delay-based sampling mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If a high frequency oscillator is used in the decoder module, then decoding precision is improved, but power consumption increases

Engineering Contradiction:
Improvedecoding precisionVSAvoiddecoder power consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The decoder module generates its own reference signal from the incoming encoded signal using a delay element, eliminating the need for a high frequency oscillator. This self-service approach maintains decoding precision through accurate delayed sampling while dramatically reducing power consumption by removing the power-hungry oscillator component.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The mechanical/high-frequency oscillating system (oscillator) is replaced with a passive delay element that operates at the signal frequency itself. This substitution eliminates the need for high frequency generation while maintaining the timing precision required for accurate decoding through the delay-based sampling approach.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8864027B2Low-power pulse width encoding scheme and counter-less shift register that may be employed therewith
Publication Date: 2014.10.21 UNIV OF PITTSBURGH OF THE COMMONWEALTH SYST OF HIGHER EDUCATION
  • US8864027B2 patent drawing
  • US8864027B2 patent drawing
  • US8864027B2 patent drawing

AI summary

A method of decoding an encoded signal includes steps of receiving the encoded signal, creating a decoding signal by delaying the encoded signal by a predetermined amount of time Δ, sampling the encoded signal using the decoding signal, and determining a value of each of a plurality of decoded bits represented by the encoded signal based on the sampling. Also, a method of operating a shift register wherein the shift register has an initialization state wherein a first binary symbol is stored in a first position and a second binary symbol different than the first binary symbol is stored in each of one or more intermediate positions and a last position. The method includes determining that the shift register is full responsive to detecting that the first binary symbol has been stored in either one of the intermediate positions or the last position.