Printed Wiring Board Seed Layer Configuration
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Solution Overview
Problem
Existing printed wiring board manufacturing methods face challenges in achieving high productivity and cost-effectiveness while maintaining connection reliability, particularly due to differences in adhesion strength between sputtered and electroless plated seed layers, and the presence of voids in conductor layers.
Innovation Solution
The printed wiring board is designed with a layered structure where the uppermost conductor layer is formed on a build-up part with conductor layers and resin insulating layers. The conductor layers in the upper build-up part include a seed layer formed by sputtering and an electrolytic plating layer, while those in the lower build-up part include a seed layer formed by electroless plating and an electrolytic plating layer, optimizing the formation process to minimize voids and enhance adhesion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all seed layers are formed by sputtering to ensure high adhesion strength, then connection reliability is improved, but manufacturing cost and production time increase
Solution Approach 1:
The patent applies different seed layer formation methods to different locations: sputtering is used for the upper build-up part where high adhesion is critical for component mounting, while electroless plating is used for the lower build-up part where cost efficiency is prioritized. This local differentiation resolves the contradiction by optimizing adhesion only where necessary.
Solution Approach 2:
The build-up structure is divided into upper and lower parts with different manufacturing requirements. The upper build-up part uses sputtered seed layers for high reliability, while the lower build-up part uses electroless plated seed layers for cost efficiency, allowing simultaneous optimization of both reliability and productivity.
2Manufacturing precision
If all seed layers are formed by sputtering to ensure uniform thickness and quality, then manufacturing precision is improved, but production cost increases
Solution Approach 1:
The patent recognizes that not all seed layers require the same level of precision. The upper build-up part seed layers require high uniformity for reliable component mounting, while lower build-up part seed layers can tolerate more variation. This allows using expensive sputtering only where precision is critical and cheaper electroless plating elsewhere.
3Ease of manufacture
If electroless plating is used for all seed layers to reduce cost, then manufacturing cost decreases, but adhesion strength and connection reliability deteriorate
Solution Approach 1:
The patent applies electroless plating to the lower build-up part where cost reduction is prioritized and adhesion requirements are less stringent, while using sputtering in the upper build-up part where high adhesion strength is essential for supporting mounted components. This resolves the contradiction by matching manufacturing method to local requirements.
4Manufacturing precision
If sputtering is used for all conductor layers to minimize voids, then manufacturing precision is improved, but productivity decreases
Solution Approach 1:
The patent recognizes that void minimization is more critical in the upper build-up part where conductor layers support mounted components, while the lower build-up part can tolerate more voids. This allows using slower sputtering only where void-free layers are essential and faster electroless plating elsewhere, resolving the productivity-precision contradiction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances productivity and reduces production costs by avoiding the need for all seed layers to be formed by sputtering, while maintaining high connection reliability and stability under repeated stress, such as during heat cycles.
Implementation Method 1
each of the conductor layers includes a seed layer formed by sputtering
Implementation Method 2
each of the conductor layers includes a seed layer formed by electroless plating
Implementation Method 3
an electrolytic plating layer formed below the seed layer
Data Source
AI summary
A printed wiring board includes an uppermost conductor layer having an electrode that mounts an electronic component, an upper build-up part including conductor layers and resin insulating layers such that the uppermost conductor layer is formed on the upper build-up part, and a lower build-up part including conductor layers and resin insulating layers and formed such that the lower build-up part is formed below the upper build-up part. The upper build-up part is formed such that each of the conductor layers includes a seed layer formed by sputtering, and an electrolytic plating layer formed below the seed layer, and the lower build-up part is formed such that each of the conductor layers includes a seed layer formed by electroless plating, and an electrolytic plating layer formed below the seed layer.