PWM Gate Voltage Control for Low-Loss Semiconductor Switching
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Solution Overview
Problem
Existing gate control methods for semiconductor components, such as IGBTs, result in high switching losses and inefficiencies due to the need for high gate resistance to limit RFI emissions, which compromises switching speed and reliability, especially during fault situations.
Innovation Solution
Implementing a pulse width modulation method that dynamically adjusts gate voltages based on pre-determined values, using a microprocessor to generate optimal gate voltage ratios from auxiliary voltages, allowing separate control of voltage and current change rates, and enabling symmetric auxiliary voltages for improved controllability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If high gate resistance is used to limit RFI emissions, then electromagnetic interference is reduced, but switching speed decreases and switching losses increase
Solution Approach 1:
The gate resistance is made dynamically adjustable rather than fixed. The control circuitry changes the gate resistance value based on operating conditions - using lower resistance during normal switching to minimize losses, and higher resistance during fault conditions to limit RFI emissions and protect the device.
Solution Approach 2:
The electrical parameter (gate resistance) is changed according to operating conditions. The system transitions between different resistance values to optimize performance for different scenarios - low resistance for efficient switching, high resistance for RFI suppression during faults.
2Object-affected harmful factors
If high gate resistance is used to limit RFI emissions, then electromagnetic interference is reduced, but switching speed decreases
Solution Approach 1:
The gate resistance is made dynamically adjustable rather than fixed. The control circuitry changes the gate resistance value based on operating conditions - using lower resistance during normal switching to minimize losses, and higher resistance during fault conditions to limit RFI emissions and protect the device.
Solution Approach 2:
The electrical parameter (gate resistance) is changed according to operating conditions. The system transitions between different resistance values to optimize performance for different scenarios - low resistance for efficient switching, high resistance for RFI suppression during faults.
3Reliability
If asymmetrical gate voltages are used to improve switching control, then reliability is improved, but device complexity increases
Solution Approach 1:
The control circuitry is designed to provide multiple functions: it generates both positive and negative gate voltages, adjusts gate resistance dynamically, detects fault conditions, and controls switching sequences. This multi-functional approach consolidates what would otherwise require separate circuits into a single integrated control unit.
Data Source
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AI summary
A method of controlling a semiconductor component and a control arrangement, which component (1) comprises a voltage controlled gate. The method comprises the steps of determining and storing, prior to use of the semiconductor component (1), reference values of a gate voltage to be given to the gate of the semiconductor component during a change of operating states, and providing a pulse width modulated voltage from a driver circuit (C1) to a resistor (Rg) connected to the gate of the semiconductor component (1) according to the stored reference values of the gate voltage when a change in operating states of the semiconductor component (1) is desired.