Pyramid-Shaped Transistors for Image Sensors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As image sensor pixel count increases, bitline setting time also increases due to higher bitline loading, leading to short channel effects and undesirable noise like Random Telegraph Signal (RTS), while attempts to enhance transconductance by shortening channel length or widening channel width are constrained by pixel size and result in increased pixel size or noise.
Innovation Solution
The use of transistors with nonplanar channels in at least one channel width plane and one channel length plane, which increases transconductance without increasing pixel width, and can be fabricated using an efficient wet etching process to reduce deleterious effects such as RTS and read noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the source follower channel length is shortened to increase transconductance, then the transconductance (Gm) increases, but short channel effects and noise (e.g., RTS) increase
Solution Approach 1:
The patent transitions from a planar channel structure to a three-dimensional FinFET structure with vertical fins. This dimensional change allows the channel to extend vertically into the substrate, increasing the effective channel width and transconductance without reducing the horizontal channel length, thereby avoiding short channel effects while maintaining high Gm
Solution Approach 2:
The FinFET structure nests multiple channel surfaces within a compact footprint by creating vertical fins that expose channel regions on multiple sides. This nesting approach increases the effective channel area without increasing the planar pixel size, resolving the contradiction between high transconductance and compact pixel dimensions
2Power
If the source follower channel width is increased to increase transconductance, then the transconductance (Gm) increases, but the pixel size increases
Solution Approach 1:
The patent utilizes the vertical dimension by creating fins that extend downward into the substrate. This allows the channel width to be effectively increased through the vertical fin structure rather than expanding the horizontal pixel area, thereby increasing transconductance without increasing pixel size
Solution Approach 2:
The thin fin structures act as flexible channel regions that can be configured vertically within the substrate. These thin film-like fins provide large surface area for charge transport in a compact volume, enabling high transconductance in a small pixel footprint
3Power
If the row select channel length is shortened to increase transconductance, then the transconductance (Gm) increases, but short channel effects and noise (e.g., RTS) increase
Solution Approach 1:
The row select transistor also employs the FinFET vertical channel structure, allowing the channel to extend vertically rather than horizontally. This maintains a longer effective channel length for better noise performance while achieving high transconductance through the increased vertical surface area of the fins
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for higher operation speed and reduced noise in image sensors without increasing pixel width, while also enabling economical and efficient manufacturing.
Implementation Method 1
can be fabricated using an efficient wet etching process to reduce deleterious effects such as RTS and read noise
Data Source
AI summary
Transistors include a pyramid-shaped gate trench defined by a triangular shape or a trapezoidal shape in a channel width plane and a trapezoidal shape in a channel length plane. Side wall portions of the pyramid-shaped gate trench form a channel having a triangular shape or a trapezoidal shape in the channel width plane. Advantageously, such transistors increase transconductance without increasing pixel width. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.


