QFN Lead Frame Plating Before Stamping

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Solution Overview

Problem

In existing lead frame structures for quad flat no-lead (QFN) packages, residual metal material on side walls after plating can lead to delamination and reduced electrical reliability due to moisture invasion, resulting in weak bonding between the lead frame and package material.

Innovation Solution

A lead frame structure where a metal layer is formed before the stamping process, ensuring no residual metal is left on side walls, and is firmly bonded to the main base and terminals, with additional metal layers for enhanced bonding and protection against oxidation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the metal layer is plated on the lead frame after formation of the elements, then the electrical connection is enhanced, but residual metal material is left on side walls causing delamination and reducing reliability

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidresidual metal material on side walls
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The metal layer is plated on the lead frame before the stamping process forms the elements, rather than after. This preliminary plating action ensures that when the stamping process creates the elements with vertical side walls, no additional metal material is deposited on these side walls, eliminating the source of delamination while maintaining enhanced electrical connection on the bonding surfaces

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If the metal layer is plated after element formation, then the plating process is simpler, but package material delaminates from the metal layer due to residual metal on side walls

Engineering Contradiction:
Improveplating process simplicityVSAvoidbonding strength between package material and lead frame
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The plating process is performed preliminarily before the stamping process that forms the elements. This sequence maintains plating process simplicity while preventing delamination, because the elements' side walls are not yet formed during plating, so no residual metal accumulates there to create bonding weaknesses

Inventive Principle:
Principle #10Preliminary action

3Quantity of substance

If residual metal material remains on side walls, then material utilization is higher, but moisture invades through delaminated parts reducing electrical reliability

Engineering Contradiction:
Improvemetal material utilizationVSAvoidmoisture invasion through delamination
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

By plating the metal layer before element formation, the patent eliminates residual metal on side walls that would create delamination pathways for moisture. The metal material is still efficiently utilized on the bonding surfaces for electrical connection, but without creating the harmful delamination structures that enable moisture invasion

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in improved encapsulation quality, electrical connection reliability, and stronger bonding between the lead frame and package material, enhancing the overall performance of the QFN package.

Implementation Method 1

forming a patterned metal layer on a front surface of the metal plate

Methodology Applied
Scientific EffectPlating process: Electroplating

Data Source

PatentUS9607933B2Lead frame structure for quad flat no-lead package, quad flat no-lead package and method for forming the lead frame structure
Publication Date: 2017.03.28 KING YUAN ELECTRONICS
  • US9607933B2 patent drawing
  • US9607933B2 patent drawing
  • US9607933B2 patent drawing

AI summary

A lead frame structure for quad flat no-lead (QFN) package includes a main base, a plurality of terminals and a first metal layer. The main base has a center area for carrying a semiconductor die, and a periphery area surrounding the center area. The plurality of terminals are arranged around the main base. The first metal layer has a first part formed on the periphery area of the main base, and a second part formed on the plurality of terminals. Wherein the main base and the plurality of terminals are formed by a stamping process, and the first metal layer is formed by a plating process before the stamping process.