QFN Terminal Side Plating for PCB Solder Fillet Formation
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Solution Overview
Problem
Conventional QFN-type semiconductor packages face challenges in achieving good solder wettability at the side surfaces of connection terminals, leading to difficulties in forming a proper fillet when mounted on printed circuit boards due to the lack of plating on these surfaces.
Innovation Solution
The semiconductor package design includes a plating layer on both the bottom and side surfaces of the external connection terminals, formed through an electrolytic plating process after creating a first opening that exposes these surfaces, enhancing solder wettability and fillet formation during mounting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional QFN-type semiconductor packages are manufactured without plating on the side surfaces of connection terminals, then the manufacturing process is simpler and cost-effective, but solder wettability is poor and fillet formation is difficult
Solution Approach 1:
A plating layer is formed on the side surfaces of the connection terminals before the semiconductor device is mounted on the printed circuit board. This preliminary plating action ensures that the surfaces are ready for soldering, improving wettability and fillet formation without adding complexity to the mounting process itself.
Solution Approach 2:
The plating layer is applied selectively to the side surfaces of the connection terminals that will be exposed after sealing, rather than plating the entire terminal structure. This localized approach improves solder wettability where needed while minimizing the overall plating process complexity and material usage.
2Reliability
If a plating layer is formed on the side surfaces of external connection terminals through electrolytic plating, then solder wettability and fillet formation are improved, but the manufacturing process becomes more complex
Solution Approach 1:
The electrolytic plating process is performed as a preliminary step before final assembly and sealing. By preparing the surfaces in advance, the actual mounting process becomes easier and more reliable, as the soldering conditions are already optimized with proper plating on the exposed side surfaces.
Solution Approach 2:
The plating layer acts as an intermediary between the connection terminal and the solder, improving the interface quality for fillet formation. This intermediate layer facilitates better solder wetting and adhesion, making the overall manufacturing process more reliable despite the added plating step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves solder wettability at the side surfaces of the external connection terminals, facilitating better fillet formation and ensuring reliable mounting on printed circuit boards.
Implementation Method 1
performing an electrolytic plating process to supply an electric current to the lead frame to form a plating layer on an exposed area of the lead frame
Data Source
AI summary
A semiconductor package includes a die pad; a plurality of external connection terminals located around the die pad; a semiconductor chip located on a top surface of the die pad and electrically connected with the plurality of external connection terminals; and a sealing member covering the die pad, the plurality of external connection terminals and the semiconductor chip and exposing an outer terminal of each of the plurality of external connection terminals. A side surface of the outer terminal of each of the plurality of external connection terminals includes a first area, and the first area is plated.