QLC Memory Programming with Single-Pulse Pre-Conditioning
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Solution Overview
Problem
Multi-pass program operations in flash memory devices, particularly for quad-level cells (QLCs), result in insufficient read window margins and increased program time due to multiple voltage pulses, affecting device performance.
Innovation Solution
A pre-programming scheme using a single voltage pulse with amplitude changes over time, applied in multiple periods, to set memory cells to pre-programmed levels before fine programming, thereby tightening threshold voltage distribution and reducing program time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple voltage pulses are applied in multi-pass program operations, then programming can be performed, but program time increases and read window margins become insufficient
Solution Approach 1:
The patent applies preliminary action by performing pre-programming before the main programming operation. A first program pass programs memory cells to intermediate levels, then a single voltage pulse with amplitude changes pre-programs cells to pre-programmed levels, finally completing the programming in a second pass. This preliminary pre-programming step tightens threshold voltage distribution and improves read window margins without requiring multiple separate voltage pulse sequences.
Solution Approach 2:
The patent utilizes parameter changes by varying the amplitude of a single voltage pulse over time during the pre-programming step. The voltage pulse amplitude changes through multiple periods, allowing different portions of the memory cell threshold voltage distribution to be addressed sequentially. This single pulse with changing parameters replaces multiple discrete voltage pulses, reducing program time while maintaining programming accuracy.
2Reliability
If multiple voltage pulses are used for programming, then programming completeness is achieved, but device complexity increases
Solution Approach 1:
The patent merges multiple voltage pulse operations into a single voltage pulse with time-varying amplitude. Instead of applying separate voltage pulses for different programming stages, the invention combines them into one pulse that transitions through multiple amplitude levels over time. This merging simplifies the control mechanism while achieving the same programming completeness through the pre-programming approach.
Data Source
AI summary
In certain aspects, a memory device includes an array of memory cells, word lines respectively coupled to rows of the memory cells, and a peripheral circuit coupled to the array of memory cells through the word lines. Each memory cell is set to one of 2N final levels corresponding to a piece of N-bits data, where N is an integer greater than 2. The peripheral circuit is configured to program, in a first pass, a select row of the rows of the memory cells, such that the memory cells in the selected row are set to k intermediate levels, where k is an integer not greater than 2N. The peripheral circuit is also configured to, after the first pass, apply a single voltage pulse to a select word line of the word lines coupled to the select row of the memory cells, wherein an amplitude of the single voltage pulse changes over time. The peripheral circuit is further configured to, after applying the single voltage pulse, program, in a second pass, the select row of the memory cells, such that the memory cells in the selected row are set to the 2N final levels.