Quadrangular Interconnects for Semiconductor Pad Stress Relief
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor device structures experience stress and crack formation in interlayer insulating films due to impact loads from wire bonding and probing, which degrade the reliability of the device.
Innovation Solution
The semiconductor device incorporates interconnects with quadrangular plan shapes spaced apart below the pad to disperse and relieve stress, reducing the generation of cracks in the interlayer insulating film by eliminating apexes with internal angles greater than 180 degrees and optimizing the area and direction of the interconnects for effective stress relief.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal layer is formed in a comb-like plan shape below the pad to protect active devices from bonding stress, then the active device is protected from stress, but large stress is generated at apexes with internal angles of about 270 degrees which creates cracks in the interlayer insulating film
Solution Approach 1:
The continuous metal layer is segmented into multiple isolated interconnects arranged in a grid pattern below the pad. This segmentation eliminates the apexes with large internal angles that generate stress, while still providing stress distribution and protection to the active device underneath.
Solution Approach 2:
The interconnects are designed with specific geometric characteristics - rectangular shapes with sides parallel to the pad edges, positioned at regular intervals. This asymmetric arrangement optimizes stress relief in critical directions while minimizing stress concentration at interconnect corners.
Data Source
AI summary
A semiconductor device includes: a semiconductor substrate; a first interlayer insulating film formed over the semiconductor substrate; a pad formed above the first interlayer insulating film; and a plurality of first interconnects spaced apart from each other in a portion of the first interlayer insulating film located below the pad. Below the pad, the first interconnects are formed in quadrangular plan shapes.


