Quantum Dot Gate Spacing via Spacer-Defined Thermal Oxidation

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Solution Overview

Problem

Current methods for producing closely spaced gate structures in quantum dot devices on semiconductor substrates often damage the substrate due to plasma etching, leading to non-uniform dielectric spacing and gate heights, which deteriorate qubit states and device performance.

Innovation Solution

A method involving the formation of parallel mandrel structures, side spacers, and selective removal of mandrel portions, followed by thermal oxidation to create a low-defect density gate oxide with uniform thickness, eliminating the need for multiple patterning steps and reducing substrate exposure to plasma etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple patterning steps with plasma etching are used to form closely spaced gates, then gate structures can be formed with small spacing, but substrate damage occurs and qubit states deteriorate

Engineering Contradiction:
Improvegate spacingVSAvoidsubstrate damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The process segments the gate formation into distinct stages: first forming mandrels with initial spacing, then using spacer deposition to achieve final close spacing. This segmentation allows the use of gentler deposition processes instead of repeated plasma etching, reducing substrate damage while achieving the required gate spacing precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces spacer structures as intermediary elements between the mandrels and final gate structures. These spacers are deposited using atomic layer deposition (ALD) which is less damaging to the substrate than plasma etching, thereby achieving close gate spacing without the harmful effects of multiple plasma etching steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If consecutive gate patterning steps are used, then gate structures can be formed, but dielectric spacing becomes non-uniform and gate heights vary

Engineering Contradiction:
Improvegate formationVSAvoidspacing uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent performs preliminary actions by first forming mandrels with uniform spacing, then depositing conformal spacers that automatically ensure uniform dielectric spacing. The spacers are deposited using atomic layer deposition which provides excellent conformality, ensuring uniform thickness and spacing before the final gate formation step.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces the mechanical/plasma-based etching system with a chemical vapor deposition system (atomic layer deposition) for forming the spacer layers. This substitution provides better control over thickness uniformity and spacing precision, eliminating the non-uniformity issues associated with multiple patterning and etching steps.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If atomic layer deposition is used to deposit oxide after each gate step, then gate structures can be formed, but oxide defect density increases progressively

Engineering Contradiction:
Improveoxide depositionVSAvoidoxide quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent performs the oxide deposition as a preliminary action before the gate patterning steps, rather than after each gate formation step. This single preliminary oxide deposition is followed by spacer formation and mandrel removal, avoiding the progressive degradation of oxide quality that occurs with repeated ALD cycles after each gate step.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in gate structures with uniform height and dielectric spacing, enhancing the reliability and quality of quantum dot devices by minimizing substrate damage and maintaining qubit coherence.

Implementation Method 1

The gate oxide of a quantum dot device is then formed in the areas between the spacers, by a thermal oxidation of the semiconductor material of the substrate

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Data Source

PatentEP4371932A1A method for producing closely spaced gate structures of a quantum dot device
Publication Date: 2024.05.22 INTERUNIVERSITAIR MICRO ELECTRONICS CENT (IMEC VZW)
  • EP4371932A1 patent drawingFigure 1~3
  • EP4371932A1 patent drawingFigure 4~6
  • EP4371932A1 patent drawingFigure 7~9

AI summary

According to the method of the invention, a plurality of mutually parallel mandrel structures (4,4') is produced on a substrate (1) comprising at least a top layer of semiconductor material. Side spacers (5) are formed on the mandrel structures, and the mandrel structures are removed with respect to the spacers. This involves the formation of an auxiliary layer on the substrate, that enables the selective removal of at least a top portion of the mandrels, followed by the removal of the auxiliary layer and possibly any remaining portions of the mandrels. The gate oxide (10) of a quantum dot device is formed in the areas between the spacers, by a thermal oxidation of the semiconductor material of the substrate. The thermal oxidation enables the formation of a gate oxide having low defect density and a constant thickness. The spacer material (5) is chosen to withstand the thermal oxidation and acts as an insulator between the gate structures (15). The formation of the gate structures (15) as such is done by techniques taken from or similar to the known replacement gate technology.