Quartz Crystal Resonator Package with 3D Wiring
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Solution Overview
Problem
The existing piezoelectric devices face challenges in reducing the planar size due to complex wiring patterns, which can degrade the resonation characteristics of the piezoelectric resonation element and hinder further miniaturization, and are prone to parasitic capacitance issues.
Innovation Solution
The configuration includes a first and second substrate with through holes, where the first and second wiring patterns are routed on different surfaces, allowing them to intersect three-dimensionally and superimpose on each other, reducing the occupancy area and avoiding parasitic capacitance by placing the wiring patterns on the second substrate surface, and using conductive films for improved thermal conduction and image recognition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the pair of mounting terminals are disposed respectively on diagonal lines of the bottom, then the electrical connection between piezoelectric resonation element and temperature-sensitive component is achieved, but the routing of wiring patterns becomes complicated and planar size cannot be reduced further
Solution Approach 1:
The patent applies dimensionality change by routing wiring patterns on both the front face and back face of the second insulating substrate. This allows the wiring patterns to utilize the third dimension (thickness direction) to reduce planar routing complexity. Specifically, the first wiring pattern is routed on the front face while the second wiring pattern is routed on the back face, enabling the wiring to connect diagonal mounting terminals without requiring excessively long or complex planar paths.
2Device complexity
If the first wiring pattern is routed on the front face of the second insulating substrate, then the routing complexity is reduced, but parasitic capacitance is generated between excitation electrode and first wiring pattern degrading resonation characteristics
Solution Approach 1:
The patent segments the wiring routing into two separate parts: the first wiring pattern is routed on the front face of the second insulating substrate, while the second wiring pattern is routed on the back face. This segmentation allows the first wiring pattern to be positioned away from the piezoelectric resonation element's excitation electrode, reducing parasitic capacitance. The segmentation also simplifies routing complexity by dedicating specific faces to specific wiring functions.
3Ease of manufacture
If both wiring patterns are routed on the back face of the second insulating substrate, then the manufacturing process is simplified, but the wiring patterns occupy large area and interfere with each other
Solution Approach 1:
The patent utilizes the thickness direction of the second insulating substrate to route wiring patterns on both the front face and back face. This dimensional approach allows the first and second wiring patterns to be spatially separated, reducing their planar occupancy area and minimizing mutual interference. The wiring patterns still connect to the same mounting terminals but approach them from different sides, effectively utilizing the available three-dimensional space.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves a further reduction in plane size, maintains resonation characteristics, and improves thermal conduction and image recognition accuracy, enabling more precise mounting and temperature compensation.
Implementation Method 1
At least one of the third electrode pad and the fourth electrode pad is connected to any one of the third mounting terminal and the fourth mounting terminal through a first conductive film provided on an inner wall of the through hole
Implementation Method 2
a piezoelectric device has been known which includes a piezoelectric resonation element
Data Source
AI summary
A quartz crystal resonator includes a quartz crystal resonator element, a thermistor, a second layer including a first principal surface and a second principal surface, and a third layer having a through hole. internal terminals are provided on the first principal surface side, and electrode pads are provided in a portion exposed from the through hole on the second principal surface side. The quartz crystal resonator element is attached to the internal terminals, and the thermistor is attached to the electrode pads. Two mounting terminals are provided on a first diagonal line on the third principal surface side of the third layer, and two mounting terminals are provided on a second diagonal line. At least one of the two electrode pads is connected to any one of the two mounting terminals on the second diagonal line through a first conductive film provided on an inner wall of the through hole.