Quaternized Ammonium Levelers for Copper Plating
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Solution Overview
Problem
Current copper plating methods for semiconductor devices face challenges in achieving uniform deposition and rapid filling of submicron features and through silicon vias, leading to issues like overplating, void formation, and slow filling times, which affect the commercial feasibility of devices with high aspect ratios and small dimensions.
Innovation Solution
Development of novel electrolytic plating compositions containing quaternized ammonium-based levelers that promote rapid bottom-up growth by controlling the diffusion rate and concentration of suppressor and accelerator molecules, ensuring efficient filling of submicron features and through silicon vias with minimal voids and overburden.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional copper plating methods are used, then copper can be deposited into interconnect features, but the deposition is not uniform and overplating occurs on field areas
Solution Approach 1:
The patent employs suppressor and accelerator additives that create locally different deposition rates: suppressors inhibit copper deposition on field areas while accelerators promote deposition in interconnect features. This local differentiation enables uniform filling of submicron features without excessive overplating on surrounding surfaces, directly resolving the uniformity versus overplating contradiction
2Productivity
If conventional plating methods are used, then copper deposition can proceed, but filling time for submicron features and through silicon vias is excessive
Solution Approach 1:
The patent utilizes pulsed direct current plating where current is periodically applied and interrupted. During pulse on-time, copper deposits rapidly into features; during pulse off-time, diffusional smoothing occurs. This periodic action accelerates feature filling while maintaining uniformity, resolving the productivity versus time loss contradiction by optimizing the fill rate without requiring excessively long plating durations
3Reliability
If suppressor and accelerator concentrations are not optimized, then plating can proceed, but void formation occurs in interconnect features
Solution Approach 1:
The patent systematically optimizes the concentrations of suppressor and accelerator additives to achieve the critical balance needed for void-free filling. By precisely controlling these chemical parameters, the deposition process achieves both uniformity and complete feature filling without voids, resolving the reliability versus manufacturing precision contradiction through parameter optimization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The novel levelers enable faster and more uniform copper deposition, reducing void formation and overplating, and significantly reducing filling times for both submicron features and through silicon vias, enhancing the commercial viability of devices with high aspect ratios and small dimensions.
Implementation Method 1
electrolytic copper deposition
Implementation Method 2
controlling the diffusion rate and concentration of suppressor and accelerator molecules
Data Source
AI summary
A composition for electrolytic plating in microelectronics which contains a leveler that comprises the reaction product of an aliphatic di(t-amine) with an alkylating agent. Electrolytic plating methods employing the leveler, a method for making the leveler, and the leveler compound.