Queue Register Command Set Storage for Semiconductor Storage Devices
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Solution Overview
Problem
Current semiconductor storage devices face challenges in achieving high-speed operations due to the need for repeated input of command sets for multiple internal operations, which increases the time required for data processing and reduces efficiency.
Innovation Solution
The semiconductor storage device incorporates a queue register capable of storing command sets during busy periods and automatically executing subsequent operations without erasing the initial command set, allowing for multiple internal operations to be executed with reduced input time by storing the command set in advance and enabling automatic execution modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If command sets are repeatedly input for multiple internal operations, then each operation can be executed correctly, but the time required for data processing increases and operational efficiency decreases
Solution Approach 1:
The queue register stores command sets in advance before they are executed. This preliminary storage allows the device to prepare multiple operations ahead of time, reducing the time required for repeated input during actual execution while ensuring each command is properly queued for reliable execution in sequence
2Productivity
If command sets are stored in advance for multiple operations, then input time is reduced and speed is improved, but the device complexity increases due to additional storage structures
Solution Approach 1:
The queue register serves as an intermediary structure between the command input interface and the execution unit. It mediates by temporarily holding command sets in a structured format, allowing efficient batch processing without requiring complex reconfiguration of the existing command execution architecture, thus balancing speed improvement with manageable complexity
3Productivity
If the queue register stores command sets during busy periods, then automatic execution is enabled and efficiency improves, but the ease of operation decreases due to automated control mechanisms
Solution Approach 1:
The queue register implements self-service by automatically managing the execution sequence of stored command sets without requiring continuous manual intervention. The system autonomously retrieves and executes commands from the queue, improving efficiency while maintaining ease of operation through simple queue management interfaces that allow operators to load commands without needing to manage each execution step manually
Data Source
AI summary
A semiconductor storage device includes a memory cell array, and a peripheral circuit that is connected to the memory cell array, and that inputs and outputs user data in response to an input of a command set including command data and address data. The peripheral circuit includes a command register, an address register, and a queue register. The command register includes an n-bit first register column capable of storing n-bit data forming the command data. The address register includes an n-bit second register column capable of storing n-bit data forming the address data. The queue register includes a plurality of third register columns, each capable of storing at least (n+1) bit data, and each third register column is capable of storing the n-bit data forming the command data or the n-bit data forming the address data.