Racetrack Memory Domain Index Controller Grouping
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Solution Overview
Problem
Racetrack magnetic memories require an efficient method to minimize buffer regions, reduce domain shift time, and lower power consumption for reading and writing data.
Innovation Solution
A memory device with multiple racetracks, domain index controllers, magnetic tunnel junction (MTJ) devices, and cell transistors, where domain index controllers shift domains based on addresses to manage racetrack groups, reducing domain shift time and power consumption by controlling currents through MTJ devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If buffer regions are included in racetrack magnetic memory, then data storage capacity is improved, but area occupied is increased
Solution Approach 1:
The racetrack memory is divided into multiple racetrack groups, with each group containing multiple racetracks. Domain index controllers are segmented to correspond with specific racetrack groups, allowing independent management and reducing the buffer region size needed for each individual racetrack while maintaining overall storage capacity.
Solution Approach 2:
The patent introduces a group-level organization dimension by arranging racetracks into groups and using domain index controllers to manage groups rather than individual tracks. This dimensional reorganization reduces the buffer region footprint while preserving storage capacity through efficient group-based domain management.
2Measurement precision
If multiple domain index controllers are used for each racetrack, then domain shift precision is improved, but device complexity is increased
Solution Approach 1:
Each domain index controller is designed to manage multiple racetracks within its group, making it a universal controller that performs domain shifting operations across several tracks. This multi-functionality reduces the total number of controllers needed while maintaining precise domain shift control through group-based management.
Solution Approach 2:
The patent merges the control functions for multiple racetracks into single domain index controllers assigned to each racetrack group. By combining control responsibilities at the group level, the system achieves precise domain shifting without requiring separate controllers for each individual racetrack, thus reducing overall device complexity.
3Speed
If domain shift operations are performed frequently, then data access speed is improved, but power consumption is increased
Solution Approach 1:
The domain index controllers pre-position domains in optimal locations within racetrack groups before read/write operations are needed. By performing preliminary domain arrangement, the system reduces the frequency and distance of subsequent domain shifts, thereby maintaining fast data access while reducing power consumption from frequent shifting operations.
Solution Approach 2:
The system implements periodic domain management where domain index controllers perform shifts at optimized intervals rather than continuously. This periodic action maintains data access speed by keeping domains in ready positions while significantly reducing power consumption by eliminating unnecessary continuous shifting operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution minimizes the buffer region size, reduces domain shift time, and lowers power consumption by efficiently managing racetrack groups with domain index controllers, enhancing data reading and writing operations in racetrack magnetic memories.
Implementation Method 1
Racetrack magnetic memories include a racetrack including a series of domains having a state according to stored data, and may move domains by a current flowing through a track
Implementation Method 2
move domains by a current flowing through a track, thereby reading data stored in a domain or writing data in a domain
Implementation Method 3
reading or writing data based on currents having passed through the plurality of first racetracks and ones of the plurality of the first MTJ devices
Data Source
AI summary
A memory device and an operating method of the memory device are provided. The memory device includes a plurality of first racetracks each including a series of domains, a bit line driver connected to first sides of ones of the plurality of first racetracks, a first domain index controller configured to shift domains of ones of the plurality of first racetracks, a plurality of first magnetic tunnel junction (MTJ) devices adjacent to the plurality of first racetracks, a plurality of first cell transistors respectively connected to ones of the plurality of first MTJ devices, and a source line driver connected to the plurality of first cell transistors by a plurality of first source lines, wherein the series of domains includes a series of domain sections, and the plurality of first MTJ devices are respectively adjacent to the series of domain sections.