Recessed Access Transistor Channel Width Optimization
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Solution Overview
Problem
The short-channel effect in conventional transistors, which occurs due to miniaturization, leads to unintended transistor activation without applying threshold voltage, and the overlay challenge between transistor gates and source/drain junctions in recessed access device (RAD) transistors during DRAM bit density increase, due to variations in the etching process.
Innovation Solution
A semiconductor device with a W-shaped word line and a second impurity region of different conductivity type, surrounded by an isolation film, is manufactured using a method involving patterned mask etching, dopant introduction, and conductive material deposition, creating a wider channel and reducing the bias voltage required for controlling the RAD transistor's operation states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the channel width is increased to overcome the short-channel effect, then the transistor activation control improves, but the lateral space required by the transistor increases
Solution Approach 1:
The patent transitions from a conventional planar channel to a three-dimensional recessed channel structure. By etching a trench into the substrate and forming the channel within this vertical dimension, the effective channel width is increased without proportionally increasing the lateral footprint. The channel extends along the trench walls, providing additional channel area while maintaining a compact planar layout.
Solution Approach 2:
The channel structure is nested within the recessed trench formed in the substrate. The isolation film is nested within the trench to define the channel region, and the gate electrode is positioned above the trench opening. This nested arrangement allows the channel to utilize the vertical space within the trench, effectively increasing channel width without increasing lateral dimensions.
2Manufacturing precision
If the etching process is optimized to achieve precise overlay between transistor gates and source/drain junctions, then the manufacturing precision improves, but the process complexity increases
Solution Approach 1:
The trench is formed as a preliminary structure before defining the source and drain regions. By pre-establishing the recessed channel geometry through trench etching, subsequent doping and gate formation processes can be precisely aligned to this predetermined structure. The trench serves as a physical template that guides the overlay of subsequent layers, reducing alignment complexity.
Solution Approach 2:
The etching process creates localized variations in substrate topology through the recessed trench structure. This local geometric modification provides inherent alignment references for subsequent processing steps. The trench walls and bottom serve as localized features that guide the positioning of source/drain junctions and gate electrodes, improving overlay precision without requiring complex global alignment processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a wider channel and reduces the bias voltage needed for controlling the RAD transistor's conducting or non-conducting states, effectively addressing the short-channel effect and overlay challenges in RAD transistors.
Implementation Method 1
introducing dopants having a first conductivity type in the etched substrate and on either side of the trench to form a plurality of first impurity regions
Data Source
AI summary
The present disclosure provides a method of manufacturing a semiconductor device. The method includes steps of providing a patterned mask having a plurality of openings on a substrate; etching the substrate through the openings to form an etched substrate and a trench in the etched substrate, wherein the etched substrate comprises a protrusion; introducing dopants having a first conductivity type in the etched substrate and on either side of the trench to form a plurality of first impurity regions; forming an isolation film in the trench; and depositing a conductive material on the isolation film.