Radial Gate Runner Layout for Uniform Thyristor Turn-Off
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Solution Overview
Problem
Large power semiconductor devices face challenges in uniform gate current distribution, leading to non-uniform turn-off performance and potential device destruction due to increased impedance and inhomogeneous gate current density, especially in large devices where the distance from the gate contact increases, resulting in slower commutation and potential failure.
Innovation Solution
The implementation of stripe-shaped electrically conductive gate runners that connect the common gate contact to the gate electrode layers of thyristor cells, decoupling the electrical paths to reduce impedance and ensure efficient gate control, allowing for reliable turn-off even in large devices by maintaining low impedance and balanced inductance distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a common gate contact is used for all thyristor cells, then the device structure is simplified and manufacturing is easier, but the gate current distribution becomes non-uniform leading to poor turn-off performance
Solution Approach 1:
The gate contact structure is segmented into a common gate contact and multiple gate runners that extend radially to different thyristor cells. This segmentation allows the gate current to be distributed more uniformly across all cells while maintaining the simplicity of a single common gate contact, thus resolving the contradiction between manufacturing ease and turn-off performance.
Solution Approach 2:
Gate runners are introduced as intermediary elements between the common gate contact and the gate electrodes of individual thyristor cells. These runners act as current distribution channels that balance the gate current flow to distant cells, ensuring uniform turn-off performance without complicating the overall device structure.
2Power
If the device area is increased to handle larger currents, then the power handling capability is improved, but the impedance increases leading to slower commutation and potential failure
Solution Approach 1:
The gate runner configuration transitions from a planar two-dimensional layout to a three-dimensional structure with radial extension from the common gate contact. This dimensional change allows gate current to reach distant thyristor cells more efficiently, reducing the impedance effect in large devices and maintaining fast commutation speed even as device area increases.
Data Source
Figure 1A~1B
Figure 2A
Figure 2B
AI summary
A turn-off power semiconductor device (100) is provided, which comprises plural first and second thyristor cells (51, 52), a common gate contact (60) and a plurality of stripe-shaped electrically conductive first gate runners (70). Each first gate runner (70) has a first end portion (70a), a second end portion (70b) opposite to the first end portion (70a) and a first connecting portion (70c) connecting the first end portion (70a) and the second end portion (70b). The first end portion (70a) of each gate runner is directly connected to the common gate contact (60) and the second end portion (70b) of each gate runner (70) is directly connected to the second gate electrode layer (171). The first gate electrode layer portions (161a) of all first thyristor cells (51) are implemented as a first gate electrode layer (161) surrounding the main electrodes of all first thyristor cells and the second gate electrode layer portions (171a) of all second thyristor cells (52) are implemented as a second gate electrode layer (171), surrounding the main electrodes of all second thryristor cells. The first gate electrode layer (161) is directly connected to the common gate contact (60). At least the first connecting portion (70c) of each first gate runner (70) is separated (95a) from the first gate electrode layer (161) and the second gate electrode (171) is separated (95b) from the first gate electrode layer (161).