RAM Retiming with Register Pushback for FPGA Clock Speed
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Solution Overview
Problem
Existing configuration methods for programmable integrated circuit devices, particularly those with random access memories (RAMs), fail to properly account for retiming designs, especially when registers need to be moved backwards through the RAM, complicating the process and affecting clock speed optimization.
Innovation Solution
A method that involves moving registers backwards through the RAM, adjusting the read and write address paths, and setting initial values to restore the RAM's pre-retiming state within one clock cycle, allowing for efficient retiming and reconfiguration of logic designs with initialized RAMs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If registers are moved backwards through the RAM to optimize clock speed, then the circuit can operate at higher clock speeds, but the configuration method becomes more complex and difficult to implement
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing the required initial values for registers before retiming is executed. The configuration tool determines the correct initial values that will restore the RAM to its pre-retiming state, and these values are embedded in the configuration data before the device is programmed. This eliminates the complexity of real-time calculations during device operation.
Solution Approach 2:
The patent introduces a configuration tool as an intermediary between the retiming process and the device configuration. This tool automatically performs the complex calculations to determine what initial values are needed in registers and RAM locations to ensure the circuit assumes its pre-retiming state after one clock cycle. The tool translates the retiming transformation into the appropriate configuration data, shielding the user from the mathematical complexity.
2Speed
If retiming is performed on designs with initialized RAM to optimize performance, then clock speed increases, but the ability to properly restore the RAM's initial state becomes compromised
Solution Approach 1:
The patent applies feedback by using the known pre-retiming state of the RAM as a reference point. The configuration tool calculates initial values that will cause the RAM to feedback to its original state after one clock cycle of operation with the retimed design. This ensures that the functional behavior of the circuit is preserved despite the physical relocation of registers.
Solution Approach 2:
The patent changes parameters by modifying the initial values stored in registers and RAM locations to compensate for the retiming transformation. Specifically, it changes which values are initially loaded into the circuit elements so that despite the structural changes from retiming, the circuit produces the correct output sequence. The configuration tool determines these parameter changes automatically.
3Adaptability or versatility
If manual logic layout is attempted for larger programmable devices, then design flexibility is maintained, but the complexity of laying out logic without software becomes impractical
Solution Approach 1:
The patent applies self-service by enabling the configuration tool to automatically handle the complex task of determining initial register values and RAM contents. The tool serves itself by performing the calculations that would otherwise require manual intervention, analyzing the retimed design and generating the appropriate configuration data without requiring the user to manually compute each value.
Data Source
AI summary
A method of retiming a circuit that includes a RAM having data stored therein, a register following the RAM, and registers preceding the RAM for registering input, address and enable signals of the RAM includes pushing a value in the register following the RAM back into a memory location in the RAM, pushing back data stored in the RAM and initial values in the registers preceding the RAM to accommodate the value pushed back from the register following the RAM, and setting new values in the registers preceding the RAM so that, on a first clock cycle after retiming, the circuit assumes a condition before retiming. The method also may be used to configure a programmable logic device with a user logic design.