Reverse Polarity RAM Erasure via Switch Matrix Capacitor
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Solution Overview
Problem
Conventional methods for erasing secure random access memory (RAM) blocks in embedded systems are unreliable and time-consuming, making sensitive data vulnerable to tampering and recovery.
Innovation Solution
A switch matrix with a capacitor is used to decouple and recouple the power supply to the RAM in reverse polarity, providing a negative voltage for rapid and reliable erasure, overcoming the limitations of conventional methods that rely on writing '1' and '0' or shorting the supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods write '1' and '0' to overwrite the entire Trust RAM block, then data erasure is achieved, but the process takes milliseconds and is vulnerable to tampering
Solution Approach 1:
The patent applies reverse polarity voltage to the power supply of the Trust RAM block instead of using conventional overwriting methods. By inverting the voltage polarity, the memory cells are rapidly discharged, achieving immediate and reliable data destruction without the time-consuming process of writing multiple patterns to overwrite the data.
Solution Approach 2:
The patent changes the electrical parameter (voltage polarity) applied to the memory block from normal forward bias to reverse bias. This parameter change causes rapid discharge of the memory cells, transforming the erasure process from a time-consuming software-based overwriting operation to an instantaneous electrical discharge event that is resistant to tampering.
2Reliability
If the supply for the Trust RAM block is shorted to ground to erase data, then erasure is achieved, but near the threshold voltage the transistor gates discharge slowly resulting in long erasure time
Solution Approach 1:
Instead of shorting the supply to ground (forward discharge path), the patent applies reverse polarity voltage to the power supply. This inversion creates a more effective discharge path that rapidly neutralizes the charge in the transistor gates, avoiding the slow discharge that occurs near threshold voltage when using ground shorting methods.
3Productivity
If the erasure process is interrupted before completion, then partial erasure occurs, but differential charge on bit cells can be read while supply voltage is between Vdd and Vth allowing potential information recovery
Solution Approach 1:
The patent uses reverse polarity voltage to rush through the erasure process in a single rapid action, skipping the intermediate voltage states that would allow partial erasure and potential data recovery. The immediate transition to reverse polarity ensures the memory cells are rapidly discharged past any vulnerable intermediate states, making the process both fast and secure against interruption attacks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables erasure of the RAM block 1000 times faster than conventional methods, ensuring reliable and rapid data destruction, even in the presence of tampering attempts.
Implementation Method 1
the switch matrix comprises a capacitor being chargeable by a power supply coupled to the power supply input
Implementation Method 2
near the threshold voltage Vth, the transistor gates of erase Trust RAM block 140 discharge at a slower rate
Data Source
AI summary
A memory device has a switch matrix with a power supply input, a control input and a power supply output, a random access memory with a power supply connection coupled with the power supply output of the switch matrix. The switch matrix has a capacitor being chargeable by a power supply and upon receiving a control signal through the control input, the switch matrix is designed to decouple the capacitor from the power supply and the random access memory and to couple the capacitor through the power supply output with the random access memory in reverse polarity thereby providing a negative power supply to the power supply output.