Randomized Time-Interleaved DACs for Spur Suppression
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Solution Overview
Problem
High-speed time-interleaved digital-to-analog converters (DACs) face issues with undesirable spurs at the output due to mismatches between DAC cores, which are difficult to completely eliminate through design and calibration, especially at sample rates greater than 15 GSPS, affecting their performance.
Innovation Solution
Implementing a randomized time-interleaved DAC architecture where the selection of DAC cores is pseudo-randomized, spreading the energy of interleaving spurs into the noise floor or out of the band of interest, and utilizing slower DAC cores to relax design requirements such as speed, complexity, and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sequential time-interleaved DAC cores are used to increase sample rate, then productivity is improved, but object-generated harmful factors worsen due to undesirable spurs at the output
Solution Approach 1:
The patent applies dynamics by transitioning from fixed sequential selection to dynamic pseudo-random selection of DAC cores. The selection sequence is no longer static but changes unpredictably according to a pseudo-random pattern, which prevents the formation of periodic spurs while maintaining high effective sample rates through time-interleaved operation
Solution Approach 2:
The patent changes the selection parameter from deterministic sequential indexing to pseudo-random sequencing. By altering how DAC cores are selected (from fixed order to randomized order), the energy distribution of output spurs changes from concentrated discrete tones to spread spectral components, effectively reducing harmful spur levels while maintaining productivity
2Manufacturing precision
If calibration is performed to reduce mismatches between DAC cores, then manufacturing precision is improved, but device complexity worsens due to difficult calibration at high sample rates
Solution Approach 1:
The patent extracts the calibration requirement from the system by replacing it with pseudo-random selection. Instead of attempting to eliminate mismatches through complex calibration procedures, the solution removes the need for precise matching by spreading mismatch errors across the spectrum through randomized core selection, thereby reducing device complexity
Solution Approach 2:
The patent converts the harmful effect of mismatches into a beneficial spread-spectrum effect. Rather than trying to eliminate mismatches through calibration, the pseudo-random selection transforms mismatch-induced spurs into distributed noise-like components, turning a calibration problem into an acceptable spectral distribution characteristic
Data Source
AI summary
A time-interleaved digital-to-analog converter (DAC) uses M DAC cores to convert a digital input signal whose digital input words are spread to different DAC cores to produce a final analog outputs. The M DAC cores, operating in a time-interleaved fashion, can increase the sampling rate several times compared to the sampling rate of just one DAC. However, sequential time-interleaving DAC cores often exhibit undesirable spurs at the output. To spread those spurs to the noise floor, the time-interleaving DAC cores can be selected at a pseudo randomized manner or in a specific manner which can break up the sequential or periodic manner of selecting the DAC cores.