Randomized Refresh Period for Memory Write Disturb Management

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Solution Overview

Problem

Conventional memory sub-systems face performance issues due to write disturb errors, where adjacent memory units are corrupted by frequent write operations, leading to increased error rates and resource allocation challenges, as traditional refresh methods either cause oscillating behavior or result in inefficient refresh intervals.

Innovation Solution

Implementing a memory sub-system that uses a randomized refresh period, where a counter tracks write operations and generates a random or pseudo-random number within a defined range to determine when to perform refresh operations on victim memory units, preventing both short and long refresh intervals and thus mitigating write disturb errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed refresh interval is used to prevent write disturb errors, then data reliability is improved, but oscillating behavior occurs and performance decreases

Engineering Contradiction:
Improvedata reliabilityVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies dynamics by transitioning from a fixed refresh interval to a randomized refresh interval. The refresh operation is performed after a random or pseudo-random number of write operations instead of a predetermined fixed number, making the refresh timing dynamic and adaptive to actual write patterns. This eliminates oscillating behavior while maintaining data reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of refresh interval from a fixed value to a randomized value within a defined range. By generating a random or pseudo-random number between a lower and upper limit, the system varies the refresh timing parameter dynamically, preventing both short and long refresh intervals that cause oscillating behavior and performance degradation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If frequent refresh operations are performed to mitigate write disturb, then data reliability is improved, but resource usage increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidresource usage
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements partial action by performing refresh operations based on a randomized subset of write operations rather than after every write operation. The random number generator selects refresh points within a defined range, ensuring sufficient refresh coverage for reliability while avoiding excessive refresh operations that waste resources.

Inventive Principle:
Principle #16Partial or excessive action

3Device complexity

If refresh operations are performed after a fixed number of write operations, then implementation simplicity is maintained, but oscillating behavior occurs

Engineering Contradiction:
Improveimplementation simplicityVSAvoidsystem stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent introduces dynamics by replacing the fixed counter-based refresh mechanism with a randomized approach. A random or pseudo-random number is generated within a defined range to determine when refresh operations occur, eliminating the oscillating behavior caused by fixed intervals while maintaining reasonable implementation complexity through the use of standard random number generation algorithms.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11756604B2Managing write disturb for units of memory in a memory sub-system using a randomized refresh period
Publication Date: 2023.09.12 MICRON TECHNOLOGY INC
  • US11756604B2 patent drawing
  • US11756604B2 patent drawing
  • US11756604B2 patent drawing

AI summary

A memory access operation performed on a first memory unit of a memory device is detected. A counter associated with the first memory unit is modified. It is determined that the counter satisfies a threshold criterion, wherein the threshold criterion is based on a random or pseudo-random number within a margin of an average number of memory access operations. A refresh operation is performed on a second memory unit.