Range Profile Digitization Circuit for Fast Low-Noise Sampling
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Solution Overview
Problem
Existing impulse radar systems face limitations in high-speed range profile digitization due to slow rise and fall times of quantized signals, leading to missed counts and erroneous signal digitization, and high switching noise at high frequencies, which affects the accuracy and reliability of signal processing.
Innovation Solution
A range profile digitization circuit that re-uses samplers with multiple decoders and a demultiplexer, reducing capacitive load and enabling faster signal capture, along with a controller generating regular trigger signals using a multiphase frequency generator to ensure continuous and reliable sampling, and employing a differencer to delay quantization until after sampling, reducing switching noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional ADCs are used for signal digitization, then amplitude resolution can be achieved, but sampling speed is limited and cannot keep up with high PRF signals
Solution Approach 1:
The patent segments the digitization process into two distinct stages: first, a 1-bit comparator performs ultra-fast sampling at the full PRF rate to capture time resolution; second, a swept-threshold counter performs amplitude quantization over multiple pulses. This segmentation allows each stage to optimize for its specific function, achieving both high sampling speed and high amplitude resolution without the trade-off present in traditional single-stage ADCs.
Solution Approach 2:
The patent employs periodic swept-threshold sampling where the threshold voltage is incremented step-by-step across multiple pulse repetitions. For each pulse, the comparator samples at the current threshold level, and the threshold is then increased for the next pulse. This periodic action transforms the amplitude measurement into a time-based process, enabling high-speed sampling while maintaining high amplitude resolution through the cumulative counting process.
2Productivity
If multiple parallel counters are used to sample multiple range points simultaneously, then frame rate improves, but capacitive load increases causing slower signal rise and fall times
Solution Approach 1:
The patent makes each sampler universal by enabling it to serve multiple range points sequentially through the swept-threshold mechanism. Instead of dedicating one sampler per range point, a single sampler is reused across multiple range points by varying the threshold voltage and associating different threshold levels with different range bins. This multi-functionality reduces the total number of samplers needed, thereby reducing capacitive load and improving signal rise and fall times while maintaining high frame rates.
Solution Approach 2:
The patent introduces a new dimension to the sampling architecture by adding the threshold voltage dimension. Instead of only varying the time dimension (range points), the system now varies both time (for range resolution) and voltage threshold (for amplitude resolution). This dimensional expansion allows a single sampler to effectively cover multiple range points and amplitude levels, reducing hardware complexity and capacitive load while maintaining measurement capability.
3Device complexity
If early quantization is performed before sampling, then signal processing is simplified, but switching noise increases at high frequencies
Solution Approach 1:
The patent performs preliminary sampling of the analog signal at ultra-high speeds using the 1-bit comparator before any quantization occurs. This preliminary action captures the signal's time-domain characteristics with maximum fidelity. Only after this preliminary sampling is complete does the system proceed to amplitude quantization through the swept-threshold counter. This sequencing ensures that the critical sampling operation is free from quantization noise, while the subsequent quantization operates at lower effective frequencies.
Solution Approach 2:
The patent extracts the sampling function from the quantization function, separating them into distinct operational stages. The 1-bit comparator performs pure sampling without quantization, capturing the signal at the full PRF rate. The quantization process is then extracted and performed separately through the swept-threshold counter mechanism. This extraction eliminates the harmful interaction between early quantization and high-frequency sampling, as the two operations occur at different times and serve different purposes.
Data Source
AI summary
A range profile digitization circuit for converting a repeating analog input signal into a time series of digital amplitude values, the converter comprising: a signal quantizer arranged to receive the analog input signal and a threshold input and arranged to output a binary value quantized output signal based on a comparison of the input signal with the threshold signal; a plurality of samplers each arranged to sample and hold its input signal upon receipt of a trigger signal; and for each sampler: a plurality of decoders and a demultiplexer arranged to receive an output from the sampler and pass it to a selected one of said decoders based on a selector input. With a plurality of decoders associated with each of the samplers, each sampler can be re-used during the building up of the range profile.