Ray Detector Array Substrate Via Hole Etching Control

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Solution Overview

Problem

The manufacturing process of ray detector array substrates often results in over-etching, which can damage components and lead to poor connections and chamfered structures, affecting the reliability and performance of the detectors.

Innovation Solution

A method involving the formation of specific via holes and photoelectric conversion layers, with precise etching and masking techniques using photoresist sub-layers of varying thicknesses to retain portions of the photoelectric conversion layer within the via holes, preventing over-etching and ensuring uniform etching rates across different layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching is used to form via holes, then via holes can be formed, but over-etching occurs causing damage to data lines and transistors

Engineering Contradiction:
Improveetching depth controlVSAvoidcomponent integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a photoelectric conversion layer before etching the via holes. This layer serves as a protective barrier that prevents over-etching from damaging underlying components such as data lines and transistors. The photoelectric conversion layer is formed to cover the entire surface including areas where via holes will be etched, ensuring that etching stops at the desired depth without penetrating through to damage sensitive components.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The photoelectric conversion layer acts as an intermediary protective layer between the etching process and the underlying sensitive components. It mediates the etching process by providing a controlled interface that allows via hole formation while preventing excessive etching from reaching and damaging the data lines and transistors below.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If etching is performed to create via holes, then electrical connections can be established, but chamfered structures and poor connections result due to over-etching

Engineering Contradiction:
Improveconnection qualityVSAvoidetching uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The photoelectric conversion layer is formed in advance to cover all areas where via holes will be etched. This preliminary protective layer ensures uniform etching depth across all via holes, preventing chamfered structures and ensuring consistent connection quality. The layer provides a uniform stopping point for the etching process, eliminating variations in etching depth that would otherwise lead to poor connections.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If different regions are etched to varying depths, then specific components can be accessed, but non-uniform etching rates cause inconsistent results

Engineering Contradiction:
Improveselective component accessVSAvoidetching consistency
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by selectively removing the photoelectric conversion layer in specific regions where via holes are needed, while retaining it in other regions. This allows different components to be accessed in different areas of the substrate. The photoresist mask is used to define local regions where the photoelectric conversion layer should be removed, enabling selective access to underlying components while maintaining protection in other areas.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The photoelectric conversion layer is uniformly formed across the entire substrate before selective removal. This preliminary uniform formation ensures that the etching process starts from a consistent baseline across all regions, providing uniform etching rates. The subsequent selective removal is controlled by photoresist masking, which allows different regions to be accessed while maintaining overall etching consistency.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents damage to data lines and transistors during etching, maintains electrical connections, and controls etching depths, reducing the risk of chamfered structures and improving the overall reliability of the ray detector array substrates.

Implementation Method 1

forming a photoelectric conversion layer covering the first passivation layer on the base substrate, the first via hole and the second via hole being filled with a material of the photoelectric conversion layer

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS11158657B2Ray detector array substrate, manufacturing method thereof, and ray detector
Publication Date: 2021.10.26 BEIJING BOE OPTOELECTRONCIS TECH CO LTD
  • US11158657B2 patent drawing
  • US11158657B2 patent drawing
  • US11158657B2 patent drawing

AI summary

A method for manufacturing a ray detector array substrate is provided, comprising: forming a thin film transistor, a first data line and a receiving electrode on a base substrate; forming a first passivation layer on the base substrate; forming a first via hole and a second via hole in regions of the first passivation layer corresponding to the first data line and the receiving electrode, respectively; forming a photoelectric conversion layer covering the first passivation layer on the base substrate, the first via hole and the second via hole being filled with a material of the photoelectric conversion layer; etching the photoelectric conversion layer to retain a first portion of the photoelectric conversion layer inside the first via hole, and a second portion of the photoelectric conversion layer above and corresponding to the second via hole.