Ray Traversal Hardware for BVH Box-Box Testing

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Solution Overview

Problem

Ray tracing operations, particularly ray-scene intersection computations, are resource-intensive and hinder real-time performance due to the complexity of processing visibility queries in bounding volume hierarchies (BVHs).

Innovation Solution

Implementing a hybrid approach combining ray tracing cores and tensor cores within a graphics processor to accelerate ray traversal and intersection operations, utilizing specialized circuitry for bounding volume hierarchy testing and ray-primitive intersection, thereby offloading computational tasks from general-purpose graphics cores.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If ray tracing operations are performed using general-purpose graphics cores, then flexibility and adaptability are maintained, but processing speed and real-time performance deteriorate due to resource-intensive computations

Engineering Contradiction:
ImproveflexibilityVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent segments the graphics processing architecture by introducing dedicated ray tracing cores that handle specific ray traversal and intersection operations separately from general-purpose graphics cores. This segmentation allows ray tracing computations to be performed in parallel without interfering with other graphics operations, thereby improving processing speed while maintaining overall system flexibility through the coexistence of specialized and general-purpose units.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If complex bounding volume hierarchy traversal is performed, then accurate ray-scene intersection detection is achieved, but computational complexity and resource consumption increase

Engineering Contradiction:
Improveintersection detection accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces bounding volume hierarchy traversal hardware as an intermediary component between the ray generation unit and the intersection detection logic. This specialized hardware pre-processes the BVH structure and filters potential intersections before they reach the main ray tracing logic, thereby maintaining accurate intersection detection while reducing the computational complexity and resource consumption of the overall system.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If ray traversal operations are accelerated using specialized circuitry, then processing throughput is improved, but hardware complexity and device structure become more complex

Engineering Contradiction:
Improveprocessing throughputVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs the ray tracing cores and bounding volume hierarchy traversal hardware to perform multiple functions: they handle both traversal operations and intersection detections, and can work in conjunction with general-purpose graphics cores for other rendering tasks. This multi-functionality allows the specialized circuitry to achieve high processing throughput while justifying its hardware complexity through versatile utility across different rendering operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12450833B2Apparatus and method for performing box queries in ray traversal hardware
Publication Date: 2025.10.21 INTEL CORP
  • US12450833B2 patent drawing
  • US12450833B2 patent drawing
  • US12450833B2 patent drawing

AI summary

Apparatus and method for box-box testing. For example, one embodiment of a processor comprises: a bounding volume hierarchy (BVH) generator to construct a BVH comprising a plurality of hierarchically arranged BVH nodes; traversal circuitry to traverse query boxes through the BVH, the traversal circuitry to read a BVH node from a top of a BVH node stack and to read a query box from a local storage or memory, the traversal circuitry further comprising: box-box testing circuitry and/or logic to compare maximum and minimum X, Y, and Z coordinates of the BVH node and the query box and to generate an overlap indication if overlap is detected for each of the X, Y, and Z dimensions; distance determination circuitry and/or logic to generate a distance value representing an extent of overlap between the BVH node and the query box; and sorting circuitry and/or logic to sort the BVH node within a set of one or more additional BVH nodes based on the distance value.