RC-IGBT Lifetime Control Layer for Recovery Breakdown Tolerance
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Solution Overview
Problem
Reverse conducting insulated gate bipolar transistors (RC-IGBTs) face challenges in suppressing avalanche operation during recovery, leading to reduced recovery breakdown tolerance due to high current density and carrier generation in the drift layer.
Innovation Solution
A semiconductor device with a lifetime control layer formed of a crystal defect layer extending deeper than the intermediate position of the drift layer, reducing carriers near the surface and facilitating easier extension of the depletion layer during recovery, thereby suppressing avalanche operation and improving breakdown tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If light ions are implanted into the region directly below the p-type anode for local lifetime control, then recovery current is reduced, but avalanche current is generated during recovery operation reducing recovery breakdown tolerance
Solution Approach 1:
The patent applies local quality by creating a lifetime control layer at a specific depth (deeper than the intermediate position of the drift layer) rather than uniformly throughout the drift layer. This localized approach reduces carriers in the upper drift layer region where they cause avalanche current, while preserving sufficient carriers in lower regions to maintain breakdown tolerance. The lifetime control layer is formed by ion implantation at a controlled depth to achieve this selective carrier reduction.
Solution Approach 2:
The patent changes the depth parameter of the lifetime control layer from the conventional position (directly below the p-type anode) to a deeper position (below the intermediate position of the drift layer). This parameter change transforms the spatial distribution of carrier lifetime control, reducing carriers in the critical upper drift layer region while maintaining adequate carrier density in lower regions to prevent avalanche breakdown during recovery operation.
2Productivity
If current density is set high for the free wheeling diode, then device performance is improved, but carriers are generated in large quantities during transition operation causing difficulty in extending depletion layer
Solution Approach 1:
The patent applies local quality by creating a lifetime control layer at a specific depth (deeper than the intermediate position of the drift layer) rather than uniformly throughout the drift layer. This localized approach reduces carriers in the upper drift layer region where they cause avalanche current, while preserving sufficient carriers in lower regions to maintain breakdown tolerance. The lifetime control layer is formed by ion implantation at a controlled depth to achieve this selective carrier reduction.
Solution Approach 2:
The patent changes the depth parameter of the lifetime control layer from the conventional position (directly below the p-type anode) to a deeper position (below the intermediate position of the drift layer). This parameter change transforms the spatial distribution of carrier lifetime control, reducing carriers in the critical upper drift layer region while maintaining adequate carrier density in lower regions to prevent avalanche breakdown during recovery operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces carrier density near the surface, allowing for enhanced depletion layer extension and improved recovery breakdown tolerance by suppressing avalanche currents, thus enhancing the RC-IGBT's performance.
Implementation Method 1
a lifetime control layer formed of a crystal defect layer reaching a deeper position than an intermediate position of the second semiconductor layer
Implementation Method 2
This allows reduction in carriers stored in a part closer to the second main surface than the intermediate position of the second semiconductor layer
Data Source
AI summary
A semiconductor device includes a transistor and a diode formed at a common semiconductor substrate. The diode region includes: a fifth semiconductor layer of a second conductivity type; a second semiconductor layer of the second conductivity type provided on the fifth semiconductor layer; a third semiconductor layer of a first conductivity type provided closer to a first main surface of the semiconductor substrate; a sixth semiconductor layer of the first conductivity type provided on the third semiconductor layer; and a lifetime control layer formed of a crystal defect layer reaching a deeper position than an intermediate position of the second semiconductor layer between an end of the third semiconductor layer in a thickness direction as viewed from the first main surface and an end of the fifth semiconductor layer in a thickness direction as viewed from a second main surface.


